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公开(公告)号:US09659874B2
公开(公告)日:2017-05-23
申请号:US14883545
申请日:2015-10-14
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Fu-Chiang Kuo , Ying-Hsun Chen , Shih-Chi Kuo , Tsung-Hsien Lee
IPC: H01L29/06 , H01L23/544 , H01L21/308 , H01L21/306
CPC classification number: H01L23/544 , H01L21/30604 , H01L21/3081 , H01L21/3083 , H01L21/3085 , H01L21/762 , H01L21/78
Abstract: A method of forming a deep trench in a semiconductor substrate includes: forming a first mask pattern over the semiconductor substrate, in which the first mask pattern has a first opening exposing a portion of the semiconductor substrate; forming a second mask pattern over the first mask pattern, in which the second mask pattern has a second opening substantially aligned with the first opening to expose the portion of the semiconductor substrate, and the second opening has a width greater than a width of the first opening to further expose a portion of the first mask pattern; and removing the portion of the semiconductor substrate, the portion of first mask pattern and another portion of the semiconductor substrate beneath the portion of the first mask pattern to form the deep trench.
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公开(公告)号:US11373952B2
公开(公告)日:2022-06-28
申请号:US17065979
申请日:2020-10-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Fu-Chiang Kuo , Tao-Cheng Liu , Shih-Chi Kuo , Tsung-Hsien Lee
IPC: H01L23/538 , H01L21/768 , H01L21/762 , H01L23/532 , H01L21/78
Abstract: A semiconductor device includes: at least one conductive feature disposed on a substrate; at least one dielectric layer overlying the substrate, a trench structure extending through the at least one dielectric layer; and a protection layer overlaying the trench structure.
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公开(公告)号:US10804206B2
公开(公告)日:2020-10-13
申请号:US15904013
申请日:2018-02-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Fu-Chiang Kuo , Tao-Cheng Liu , Shih-Chi Kuo , Tsung-Hsien Lee
IPC: H01L21/784 , H01L23/538 , H01L21/768 , H01L21/762 , H01L23/532 , H01L21/78
Abstract: A semiconductor device includes: at least one conductive feature disposed on a substrate; at least one dielectric layer overlying the substrate, a trench structure extending through the at least one dielectric layer; and a protection layer overlaying the trench structure.
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