公开(公告)号：US20200020558A1

公开(公告)日：2020-01-16

申请号：US16449156

申请日：2019-06-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hung LIAO ,  Shiao-Ching WU ,  Jun-Xiu LIU

IPC: H01L21/67 ,  H01L21/677 ,  H01L21/68

Abstract: A method includes disposing a wafer carrier onto a load port; detecting, by a first sensor in the wafer carrier, an elevation of a slot in the wafer carrier; adjusting an elevation of a wafer transferring device according to the detected elevation of the slot; and moving, at the adjusted elevation of the wafer transferring device, a wafer to the slot by the wafer transferring device.

公开(公告)号：US20210232745A1

公开(公告)日：2021-07-29

申请号：US17103772

申请日：2020-11-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Pin CHOU ,  Chun-Wen WANG ,  Meng Ku CHI ,  Yan-Cheng CHEN ,  Jun-Xiu LIU

IPC: G06F30/367 ,  G06N20/00 ,  G06N5/04 ,  G06T7/00 ,  G06T7/70

Abstract: A semiconductor wafer defect detection system captures test images of a semiconductor wafer. The system analyzes the test images with an analysis model trained with a machine learning process. The analysis model generates simulated integrated circuit layouts based on the test images. The system detects defects in the semiconductor wafer by comparing the simulated integrated circuit layouts to reference integrated circuit layouts.

公开(公告)号：US20190252181A1

公开(公告)日：2019-08-15

申请号：US16391098

申请日：2019-04-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Chih HSU ,  Kai-Lin CHUANG ,  Yuan-Chi CHIEN ,  Jeng-Huei YANG ,  Jun-Xiu LIU

IPC: H01L21/02 ,  H01L21/67 ,  B08B17/00 ,  H01L21/306 ,  B08B3/04 ,  H01L21/687 ,  B08B13/00

CPC classification number: H01L21/02057 ,  B08B3/04 ,  B08B13/00 ,  B08B17/00 ,  H01L21/30604 ,  H01L21/67017 ,  H01L21/67057 ,  H01L21/67086 ,  H01L21/68735

Abstract: A method includes disposing a semiconductor substrate over a chuck. The chuck has a plurality of holes therein. The semiconductor substrate has a first surface facing the chuck and a second surface opposite thereto. A liquid layer is formed flowing over a top surface of the chuck by supplying liquid to the top surface of the chuck through the holes of the chuck. The semiconductor substrate is moved toward the chuck such that the first surface of the semiconductor substrate is in contact with the liquid layer and the liquid layer flows between the first surface of the semiconductor substrate and the top surface of the chuck.

公开(公告)号：US20230060183A1

公开(公告)日：2023-03-02

申请号：US17461715

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Jen YANG ,  Chung-Pin CHOU ,  Kai-Lin CHUANG ,  Yan-Cheng CHEN ,  Sheng-Ching KAO ,  Jun-Xiu LIU

IPC: G01N21/05 ,  G01N21/95

Abstract: A process tube device can detect the presence of any external materials that may reside within a fluid flowing in the tube. The process tube device detects the external materials in-situ which obviates the need for a separate inspection device to inspect the surface of a wafer after applying fluid on the surface of the wafer. The process tube device utilizes at least two methods of detecting the presence of external materials. The first is the direct measurement method in which a light detecting sensor is used. The second is the indirect measurement method in which a sensor utilizing the principles of Doppler shift is used. Here, contrary to the first method that at least partially used reflected or refracted light, the second method uses a Doppler shift sensor to detect the presence of the external material by measuring the velocity of the fluid flowing in the tube.

公开(公告)号：US20170110315A1

公开(公告)日：2017-04-20

申请号：US14918243

申请日：2015-10-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Chih HSU ,  Kai-Lin CHUANG ,  Yuan-Chi CHIEN ,  Jeng-Huei YANG ,  Jun-Xiu LIU

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/306 ,  H01L21/687 ,  B08B3/04 ,  B08B13/00

CPC classification number: H01L21/02057 ,  B08B3/04 ,  B08B13/00 ,  B08B17/00 ,  H01L21/30604 ,  H01L21/67017 ,  H01L21/67057 ,  H01L21/67086 ,  H01L21/68735

Abstract: An apparatus of processing a semiconductor substrate include a chuck, a holder, a liquid supplying system and a positive pressure unit. The chuck has a principal surface and at least a hole formed thereon. The holder is capable of holding a semiconductor substrate at a position above the principal surface. The liquid supplying system is configured to provide a liquid film onto the principal surface through the hole. The positive pressure unit is configured for providing a gas flow to a space over the chuck. A method of processing a semiconductor substrate is disclosed herein as well.

公开(公告)号：US20210027984A1

公开(公告)日：2021-01-28

申请号：US17069712

申请日：2020-10-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Pin CHOU ,  Sheng-Wen HUANG ,  Jun-Xiu LIU

IPC: H01J37/28 ,  H01J37/22 ,  G06N20/00 ,  H01J37/26 ,  H01J37/153

Abstract: This disclosure is directed to solutions of detecting and classifying wafer defects using machine learning techniques. The solutions take only one coarse resolution digital microscope image of a target wafer, and use machine learning techniques to process the coarse SEM image to review and classify a defect on the target wafer. Because only one coarse SEM image of the wafer is needed, the defect review and classification throughput and efficiency are improved. Further, the techniques are not distractive and may be integrated with other defect detecting and classification techniques.

公开(公告)号：US20200334800A1

公开(公告)日：2020-10-22

申请号：US16388435

申请日：2019-04-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Pin CHOU ,  In-Tsang LIN ,  Sheng-Wen HUANG ,  Yu-Ting WANG ,  Jui-Kuo LAI ,  Hsin-Hui CHOU ,  Jun-Xiu LIU ,  Tien-Wen WANG

IPC: G06T7/00 ,  G06T3/40 ,  G06K9/62 ,  H01L21/02 ,  H01L21/66

Abstract: A system includes an inspection device and an image processing unit. The inspection device is configured to scan a wafer to generate an inspected image. The image processing unit is configured to receive the inspected image, and is configured to analyze the inspected image by using at least one deep learning algorithm in order to determine whether there is any defect image shown in a region of interest in the inspected image. When there is at least one defect image shown in the region of interest in the inspected image, the inspection device is further configured to magnify the region of interest in the inspected image to generate a magnified inspected image for identification of defects.

公开(公告)号：US20190164264A1

公开(公告)日：2019-05-30

申请号：US15919428

申请日：2018-03-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Liang CHEN ,  Jun-Xiu LIU

IPC: G06T7/00 ,  G01N21/956 ,  H01L21/66

Abstract: Methods and systems for diagnosing a semiconductor wafer are provided. A first raw image, a second raw image, and a third raw image of the semiconductor wafer are obtained by an inspection apparatus according to graphic data system (GDS) information regarding layout of a target die. A first image-based comparison is performed by a determining circuitry on the first, second, and third raw images, so as to provide a comparison result. The comparison result indicates whether an image difference is present between the first, second, and third raw images.

公开(公告)号：US20230385502A1

公开(公告)日：2023-11-30

申请号：US18447170

申请日：2023-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Pin CHOU ,  Chun-Wen WANG ,  Meng Ku CHI ,  Yan-Cheng CHEN ,  Jun-Xiu LIU

IPC: G06F30/367 ,  G06N20/00 ,  G06N5/04 ,  G06T7/70 ,  G06T7/00

CPC classification number: G06F30/367 ,  G06N20/00 ,  G06N5/04 ,  G06T7/70 ,  G06T7/001 ,  G06T2207/10061 ,  G06T2207/30148 ,  G06T2207/20081

Abstract: A semiconductor wafer defect detection system captures test images of a semiconductor wafer. The system analyzes the test images with an analysis model trained with a machine learning process. The analysis model generates simulated integrated circuit layouts based on the test images. The system detects defects in the semiconductor wafer by comparing the simulated integrated circuit layouts to reference integrated circuit layouts.

公开(公告)号：US20220359154A1

公开(公告)日：2022-11-10

申请号：US17870654

申请日：2022-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Pin CHOU ,  Sheng-Wen HUANG ,  Jun-Xiu LIU

IPC: H01J37/28 ,  H01J37/22 ,  G06N20/00 ,  H01J37/26 ,  H01J37/153

Abstract: This disclosure is directed to solutions of detecting and classifying wafer defects using machine learning techniques. The solutions take only one coarse resolution digital microscope image of a target wafer, and use machine learning techniques to process the coarse SEM image to review and classify a defect on the target wafer. Because only one coarse SEM image of the wafer is needed, the defect review and classification throughput and efficiency are improved. Further, the techniques are not distractive and may be integrated with other defect detecting and classification techniques.