公开(公告)号：US11961768B2

公开(公告)日：2024-04-16

申请号：US18312647

申请日：2023-05-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Wen Chiu ,  Da-Yuan Lee ,  Hsien-Ming Lee ,  Kai-Cyuan Yang ,  Yu-Sheng Wang ,  Chih-Hsiang Fan ,  Kun-Wa Kuok

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823821 ,  H01L21/823814 ,  H01L21/823828 ,  H01L27/0924 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/823842 ,  H01L29/513 ,  H01L29/517

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

公开(公告)号：US20230274983A1

公开(公告)日：2023-08-31

申请号：US18312647

申请日：2023-05-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Wen Chiu ,  Da-Yuan Lee ,  Hsien-Ming Lee ,  Kai-Cyuan Yang ,  Yu-Sheng Wang ,  Chih-Hsiang Fan ,  Kun-Wa Kuok

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823821 ,  H01L21/823814 ,  H01L21/823828 ,  H01L27/0924 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/513

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

公开(公告)号：US20210043521A1

公开(公告)日：2021-02-11

申请号：US17068041

申请日：2020-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Wen Chiu ,  Da-Yuan Lee ,  Hsien-Ming Lee ,  Kai-Cyuan Yang ,  Yu-Sheng Wang ,  Chih-Hsiang Fan ,  Kun-Wa Kuok

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/78 ,  H01L27/092 ,  H01L29/66 ,  H01L29/51

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

公开(公告)号：US11682589B2

公开(公告)日：2023-06-20

申请号：US17068041

申请日：2020-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Wen Chiu ,  Da-Yuan Lee ,  Hsien-Ming Lee ,  Kai-Cyuan Yang ,  Yu-Sheng Wang ,  Chih-Hsiang Fan ,  Kun-Wa Kuok

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78 ,  H01L29/51

CPC classification number: H01L21/823821 ,  H01L21/823814 ,  H01L21/823828 ,  H01L27/0924 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/823842 ,  H01L29/513 ,  H01L29/517

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.