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    Three-dimensional memory device and method
    1.
    发明授权
    Three-dimensional memory device and method 有权

    公开(公告)号：US11856781B2

    公开(公告)日：2023-12-26

    申请号：US17194715

    申请日：2021-03-08

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： TsuChing Yang ,  Hung-Chang Sun ,  Kuo Chang Chiang ,  Sheng-Chih Lai ,  Yu-Wei Jiang

    IPC: H10B51/20 ,  H01L29/06 ,  H10B51/10

    CPC classification number: H10B51/20 ,  H01L29/0649 ,  H10B51/10

    Abstract: A method of forming a three-dimensional (3D) memory device includes: forming, over a substrate, a layer stack having alternating layers of a first conductive material and a first dielectric material; forming trenches extending vertically through the layer stack from an upper surface of the layer stack distal from the substrate to a lower surface of the layer stack facing the substrate; lining sidewalls and bottoms of the trenches with a memory film; forming a channel material over the memory film, the channel material including an amorphous material; filling the trenches with a second dielectric material after forming the channel material; forming memory cell isolation regions in the second dielectric material; forming source lines (SLs) and bit lines (BLs) that extend vertically in the second dielectric material on opposing sides of the memory cell isolation regions; and crystallizing first portions of the channel material after forming the SLs and BLs.

    THREE-DIMENSIONAL MEMORY DEVICE AND METHOD
    4.
    发明公开
    THREE-DIMENSIONAL MEMORY DEVICE AND METHOD 审中-公开

    公开(公告)号：US20240114690A1

    公开(公告)日：2024-04-04

    申请号：US18526663

    申请日：2023-12-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： TsuChing Yang ,  Hung-Chang Sun ,  Kuo Chang Chiang ,  Sheng-Chih Lai ,  Yu-Wei Jiang

    IPC: H10B51/20 ,  H01L29/06 ,  H10B51/10

    CPC classification number: H10B51/20 ,  H01L29/0649 ,  H10B51/10

    Abstract: A method of forming a three-dimensional (3D) memory device includes: forming, over a substrate, a layer stack having alternating layers of a first conductive material and a first dielectric material; forming trenches extending vertically through the layer stack from an upper surface of the layer stack distal from the substrate to a lower surface of the layer stack facing the substrate; lining sidewalls and bottoms of the trenches with a memory film; forming a channel material over the memory film, the channel material including an amorphous material; filling the trenches with a second dielectric material after forming the channel material; forming memory cell isolation regions in the second dielectric material; forming source lines (SLs) and bit lines (BLs) that extend vertically in the second dielectric material on opposing sides of the memory cell isolation regions; and crystallizing first portions of the channel material after forming the SLs and BLs.

    Three-Dimensional Memory Device and Method
    5.
    发明申请
    Three-Dimensional Memory Device and Method 有权

    公开(公告)号：US20220028894A1

    公开(公告)日：2022-01-27

    申请号：US17194715

    申请日：2021-03-08

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： TsuChing Yang ,  Hung-Chang Sun ,  Kuo Chang Chiang ,  Sheng-Chih Lai ,  Yu-Wei Jiang

    IPC: H01L27/11597 ,  H01L27/11587 ,  H01L29/06

    Abstract: A method of forming a three-dimensional (3D) memory device includes: forming, over a substrate, a layer stack having alternating layers of a first conductive material and a first dielectric material; forming trenches extending vertically through the layer stack from an upper surface of the layer stack distal from the substrate to a lower surface of the layer stack facing the substrate; lining sidewalls and bottoms of the trenches with a memory film; forming a channel material over the memory film, the channel material including an amorphous material; filling the trenches with a second dielectric material after forming the channel material; forming memory cell isolation regions in the second dielectric material; forming source lines (SLs) and bit lines (BLs) that extend vertically in the second dielectric material on opposing sides of the memory cell isolation regions; and crystallizing first portions of the channel material after forming the SLs and BLs.

    THREE-DIMENSIONAL FERROELECTRIC RANDOM ACCESS MEMORY DEVICES AND METHODS OF FORMING
    6.
    发明申请
    THREE-DIMENSIONAL FERROELECTRIC RANDOM ACCESS MEMORY DEVICES AND METHODS OF FORMING 有权

    公开(公告)号：US20220020775A1

    公开(公告)日：2022-01-20

    申请号：US17316167

    申请日：2021-05-10

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： TsuChing Yang ,  Hung-Chang Sun ,  Kuo Chang Chiang ,  Sheng-Chih Lai ,  Yu-Wei Jiang

    IPC: H01L27/11597 ,  H01L27/11587 ,  G11C11/22

    Abstract: A method of forming a ferroelectric random access memory (FeRAM) device includes: forming a layer stack over a substrate, where the layer stack includes alternating layers of a first dielectric material and a word line (WL) material; forming first trenches extending vertically through the layer stack; filling the first trenches, where filling the first trenches includes forming, in the first trenches, a ferroelectric material, a channel material over the ferroelectric material, and a second dielectric material over the channel material; after filling the first trenches, forming second trenches extending vertically through the layer stack, the second trenches being interleaved with the first trenches; and filling the second trenches, where filling the second trenches includes forming, in the second trenches, the ferroelectric material, the channel material over the ferroelectric material, and the second dielectric material over the channel material.

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