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公开(公告)号:US20210313195A1
公开(公告)日:2021-10-07
申请号:US16837381
申请日:2020-04-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuo-Ching HSU , Yu-Huan CHEN , Chen-Shien CHEN
IPC: H01L21/48 , H01L23/498 , H01L23/00
Abstract: A method for forming a chip package structure is provided. The method includes providing a wiring substrate including a substrate, a pad, and a polymer layer. The polymer layer is over the substrate and the pad, and the polymer layer has a first opening exposing the pad. The method includes forming a conductive adhesive layer over the polymer layer and the pad. The conductive adhesive layer is in direct contact with and conformally covers the polymer layer and the pad. The method includes forming a nickel layer over the conductive adhesive layer. The nickel layer is thicker than the conductive adhesive layer, and the nickel layer and the conductive adhesive layer are made of different materials. The method includes bonding a chip to the wiring substrate through a conductive bump. The conductive bump is between the nickel layer and the chip.
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公开(公告)号:US20210066181A1
公开(公告)日:2021-03-04
申请号:US16893467
申请日:2020-06-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Huan CHEN , Kuo-Ching HSU , Chen-Shien CHEN
IPC: H01L23/498 , H01L23/00 , H01L21/48
Abstract: A method for forming a chip package structure is provided. The method includes providing a wiring substrate. The method includes sequentially forming a nickel-containing layer and a gold-containing layer over the first pad. The method includes forming a conductive protection layer covering the gold-containing layer over the nickel-containing layer. The method includes bonding a chip to the wiring substrate through a conductive bump and a flux layer surrounding the conductive bump. The conductive bump is between the second pad and the chip. The method includes removing the flux layer while the conductive protection layer covers the nickel-containing layer.
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公开(公告)号:US20200058589A1
公开(公告)日:2020-02-20
申请号:US16422988
申请日:2019-05-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hong-Seng SHUE , Sheng-Han TSAI , Kuo-Chin CHANG , Mirng-Ji LII , Kuo-Ching HSU
IPC: H01L23/528 , H01L23/00 , H01L23/522
Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes a redistribution layer over the substrate. The chip structure includes a bonding pad over the redistribution layer. The chip structure includes a shielding pad over the redistribution layer and surrounding the bonding pad. The chip structure includes an insulating layer over the redistribution layer and the shielding pad. The chip structure includes a bump over the bonding pad and the insulating layer. A sidewall of the bump is over the shielding pad.
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