中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

10 records (took 0.017 seconds)

    CHIP PACKAGE STRUCTURE WITH HEAT CONDUCTIVE LAYER AND METHOD FOR FORMING THE SAME
    2.
    发明申请
    CHIP PACKAGE STRUCTURE WITH HEAT CONDUCTIVE LAYER AND METHOD FOR FORMING THE SAME 有权

    公开(公告)号：US20210118767A1

    公开(公告)日：2021-04-22

    申请号：US16654198

    申请日：2019-10-16

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Shin CHI ,  Chien-Hao HSU ,  Kuo-Chin CHANG ,  Cheng-Nan LIN ,  Mirng-Ji LII

    IPC: H01L23/373 ,  H01L21/56 ,  H01L23/00 ,  H01L21/768

    Abstract: A method for forming a chip package structure is provided. The method includes disposing a chip over a substrate. The method includes forming a heat-spreading wall structure over the substrate. The heat-spreading wall structure is adjacent to the chip, and there is a first gap between the chip and the heat-spreading wall structure. The method includes forming a first heat conductive layer in the first gap. The method includes forming a second heat conductive layer over the chip. The method includes disposing a heat-spreading lid over the substrate to cover the heat-spreading wall structure, the first heat conductive layer, the second heat conductive layer, and the chip. The heat-spreading lid is bonded to the substrate, the heat-spreading wall structure, the first heat conductive layer, and the second heat conductive layer.

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220077094A1

    公开(公告)日：2022-03-10

    申请号：US17525593

    申请日：2021-11-12

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Sheng-Yu WU ,  Ching-Hui CHEN ,  Mirng-Ji LII ,  Kai-Di WU ,  Chien-Hung KUO ,  Chao-Yi WANG ,  Hon-Lin HUANG ,  Zi-Zhong WANG ,  Chun-Mao CHIU

    IPC: H01L23/00

    Abstract: A semiconductor device includes a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump, a conductive cap over the conductive bump, and a passivation layer. The conductive pad is over the semiconductor substrate. The conductive bump is over the conductive pad, wherein the conductive bump has a stepped sidewall structure including a lower sidewall, an upper sidewall laterally offset from the lower sidewall, and an intermediary surface laterally extending from a bottom edge of the upper sidewall to a top edge of the lower sidewall. The conductive cap is over the conductive bump. The passivation layer is over the semiconductor substrate and laterally surrounds the conductive bump, wherein the passivation layer has a top surface higher than the intermediary surface of the stepped sidewall structure of the conductive bump and lower than a top surface of conductive cap.

    SEMICONDUCTOR DEVICE STRUCTURE WITH BONDING PAD AND METHOD FOR FORMING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE STRUCTURE WITH BONDING PAD AND METHOD FOR FORMING THE SAME 有权

    公开(公告)号：US20210351144A1

    公开(公告)日：2021-11-11

    申请号：US16866828

    申请日：2020-05-05

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chien-Hao HSU ,  Wei-Hsiang TU ,  Kuo-Chin CHANG ,  Mirng-Ji LII

    IPC: H01L23/00 ,  H01L49/02

    Abstract: A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a first insulating layer formed over a conductive feature and a capacitor structure embedded in the first insulating layer. The semiconductor device also includes a bonding pad formed over the first insulating layer and corresponding to the capacitor structure. The bonding pad has a top surface and a multi-step edge to form at least three corners. In addition, the semiconductor device structure includes a second insulating layer conformally covering the at least three corners formed by the top surface and the multi-step edge of the bonding pad.

    PACKAGE STRUCTURE WITH CAVITY SUBSTRATE AND METHOD FOR FORMING THE SAME
    6.
    发明申请
    PACKAGE STRUCTURE WITH CAVITY SUBSTRATE AND METHOD FOR FORMING THE SAME 有权

    公开(公告)号：US20210125961A1

    公开(公告)日：2021-04-29

    申请号：US16918188

    申请日：2020-07-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Po-Hao TSAI ,  Ming-Da CHENG ,  Mirng-Ji LII

    IPC: H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/42 ,  H01L21/52 ,  H01L21/56 ,  H01L25/00

    Abstract: A package structure is provided. The package structure includes a substrate having a first surface and a second surface opposite the first surface. The substrate includes a cavity extending from the second surface toward the first surface, and thermal vias extending from a bottom surface of the cavity to the first surface. The package structure also includes at least one electronic device formed in the cavity and thermally coupled to the thermal vias. In addition, the package structure includes an insulating layer formed over the second surface and covering the first electronic device. The insulating layer includes a redistribution layer (RDL) structure electrically connected to the electronic device. The package structure also includes an encapsulating material formed in the cavity, extending along sidewalls of the electronic device and between the electronic device and the insulating layer.

    SEMICONDUCTOR DEVICE STRUCTURE WITH MAGNETIC ELEMENT IN TESTING REGION
    7.
    发明申请
    SEMICONDUCTOR DEVICE STRUCTURE WITH MAGNETIC ELEMENT IN TESTING REGION 有权

    公开(公告)号：US20210057293A1

    公开(公告)日：2021-02-25

    申请号：US16548183

    申请日：2019-08-22

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Mill-Jer WANG ,  Tang-Jung CHIU ,  Chi-Chang LAI ,  Chia-Heng TSAI ,  Mirng-Ji LII ,  Weii LIAO

    IPC: H01L21/66 ,  H01L27/01 ,  H01L23/552

    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a testing region and multiple first conductive lines over the testing region. The first conductive lines are electrically connected in series. The semiconductor device structure also includes multiple second conductive lines over the testing region. The second conductive lines are electrically connected in series, and the second conductive lines are physically separated from the first conductive lines. The semiconductor device structure further includes multiple magnetic structures wrapping around portions of the first conductive lines and wrapping around portions of the second conductive lines. The magnetic structures are arranged in a column.

Patent Agency Ranking