公开(公告)号：US11232974B2

公开(公告)日：2022-01-25

申请号：US16546798

申请日：2019-08-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Hung Cheng ,  Pu-Fang Chen ,  Cheng-Ta Wu ,  Po-Jung Chiang ,  Ru-Liang Lee ,  Victor Y. Lu ,  Yen-Hsiu Chen ,  Yeur-Luen Tu ,  Yu-Lung Yeh ,  Shi-Chieh Lin

IPC: H01L21/762 ,  H01L21/02

Abstract: Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) device with an impurity competing layer to absorb potential contamination metal particles during an annealing process, and the SOI structure thereof. In some embodiments, an impurity competing layer is formed on the dummy substrate. An insulation layer is formed over a support substrate. A front side of the dummy wafer is bonded to the insulation layer. An annealing process is performed and the impurity competing layer absorbs metal from an upper portion of the dummy substrate. Then, a majority portion of the dummy substrate is removed including the impurity competing layer, leaving a device layer of the dummy substrate on the insulation layer.

公开(公告)号：US20220122849A1

公开(公告)日：2022-04-21

申请号：US17562247

申请日：2021-12-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pu-Fang Chen ,  Shi-Chieh Lin ,  Victor Y. Lu ,  Yeur-Luen Tu

IPC: H01L21/322 ,  H01L27/12 ,  H01L21/762

Abstract: A representative method of manufacturing a silicon-on-insulator (SOI) substrate includes steps of depositing an etch stop layer on a dummy wafer, growing an epitaxial silicon layer on the etch stop layer, forming a gettering layer on the epitaxial silicon layer, bonding a buried oxide layer of a main wafer to the gettering layer, and removing the dummy wafer and etch stop layer to expose the epitaxial silicon layer. The SOI substrate has an epitaxial silicon layer adjoining the gettering layer, with the gettering layer interposed between the buried oxide layer and the epitaxial silicon layer.

公开(公告)号：US20200176306A1

公开(公告)日：2020-06-04

申请号：US16546798

申请日：2019-08-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Hung Cheng ,  Pu-Fang Chen ,  Cheng-Ta Wu ,  Po-Jung Chiang ,  Ru-Liang Lee ,  Victor Y. Lu ,  Yen-Hsiu Chen ,  Yeur-Luen Tu ,  Yu-Lung Yeh ,  Shi-Chieh Lin

IPC: H01L21/762 ,  H01L21/02

Abstract: Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) device with an impurity competing layer to absorb potential contamination metal particles during an annealing process, and the SOI structure thereof. In some embodiments, an impurity competing layer is formed on the dummy substrate. An insulation layer is formed over a support substrate. A front side of the dummy wafer is bonded to the insulation layer. An annealing process is performed and the impurity competing layer absorbs metal from an upper portion of the dummy substrate. Then, a majority portion of the dummy substrate is removed including the impurity competing layer, leaving a device layer of the dummy substrate on the insulation layer.