公开(公告)号：US20200051837A1

公开(公告)日：2020-02-13

申请号：US16656804

申请日：2019-10-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Su-Horng Lin ,  Tsung-Hsun Yu ,  Victor Y. Lu

IPC: H01L21/67 ,  H01L21/677

Abstract: The present disclosure relates to some embodiments of a method for improving processing efficiency of a cluster tool. The method comprises transferring a first lot of wafers from a transfer load lock to a designated storage load lock and transferring a second lot of wafers from the transfer load lock to the designated storage load lock while the first lot of wafers is in the transfer load lock or the designated storage load lock. The designated storage load lock has the same structure as the transfer load lock and respectively has an inner load lock portal at an interface with the first transfer chamber and an outer load lock portal on a sidewall of a front end interface. The inner load lock portal of the designated storage load lock is retained opened during processing. The outer load lock portal of the designated storage load lock is retained closed during processing.

公开(公告)号：US10307798B2

公开(公告)日：2019-06-04

申请号：US14839625

申请日：2015-08-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Young Wang ,  Chung-En Kao ,  Victor Y. Lu

IPC: B08B3/02 ,  B08B17/02 ,  C25D21/08 ,  C25D21/00 ,  C25D17/06

Abstract: A cleaning device for removing contamination on a substrate holder used with an electroplating cell includes an arm, a cleaning agent supplier, a nozzle and a receiver. The cleaning agent supplier is coupled to the arm and configured to supply a cleaning agent. The nozzle is coupled to the cleaning agent supplier and configured to spray the cleaning agent onto the substrate holder to remove the contamination. The receiver is coupled to the arm and configured to receive the cleaning agent after the cleaning agent is sprayed onto the substrate holder.

公开(公告)号：US20220122849A1

公开(公告)日：2022-04-21

申请号：US17562247

申请日：2021-12-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pu-Fang Chen ,  Shi-Chieh Lin ,  Victor Y. Lu ,  Yeur-Luen Tu

IPC: H01L21/322 ,  H01L27/12 ,  H01L21/762

Abstract: A representative method of manufacturing a silicon-on-insulator (SOI) substrate includes steps of depositing an etch stop layer on a dummy wafer, growing an epitaxial silicon layer on the etch stop layer, forming a gettering layer on the epitaxial silicon layer, bonding a buried oxide layer of a main wafer to the gettering layer, and removing the dummy wafer and etch stop layer to expose the epitaxial silicon layer. The SOI substrate has an epitaxial silicon layer adjoining the gettering layer, with the gettering layer interposed between the buried oxide layer and the epitaxial silicon layer.

公开(公告)号：US10811263B2

公开(公告)日：2020-10-20

申请号：US16730343

申请日：2019-12-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ya-Ling Lee ,  Shing-Chyang Pan ,  Keng-Chu Lin ,  Wen-Cheng Yang ,  Chih-Tsung Lee ,  Victor Y. Lu

IPC: H01L21/285 ,  H01L21/8234 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/768

Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber and introducing a plasma-forming gas into the PVD chamber. The plasma-forming gas is an oxygen-containing gas. The method also includes applying a radio frequency (RF) power by a power source to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. The metal target is directly electrically coupled to the power source. The method further includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.

公开(公告)号：US10510566B2

公开(公告)日：2019-12-17

申请号：US14798938

申请日：2015-07-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Su-Horng Lin ,  Tsung-Hsun Yu ,  Victor Y. Lu

IPC: H01L21/67 ,  C30B25/02

Abstract: Some embodiments relate to a cluster tool for semiconductor manufacturing. The cluster tool comprises a first transfer chamber having a first transfer robot. The cluster tool further comprises a designated storage chamber and a transfer load lock attached to the first transfer chamber. The cluster tool further comprises a second transfer chamber connected to the first transfer chamber through a pair of via connector chambers, the second transfer chamber having a second transfer robot. The cluster tool further comprises at least three epitaxial deposition chamber attached to the second transfer chamber. The cluster tool further comprises a control unit configured to control the second transfer robot to transfer wafers between the designated storage chamber and the transfer load lock.

公开(公告)号：US10276397B2

公开(公告)日：2019-04-30

申请号：US14803445

申请日：2015-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Ling Lee ,  Lin-Jung Wu ,  Victor Y. Lu

IPC: H01L21/311 ,  H01L21/288 ,  H01L21/768 ,  H01L21/285 ,  H01L23/532

Abstract: The present disclosure relates to an improved method of forming interconnection layers to reduce voids and improve reliability, and an associated device. In some embodiments, a dielectric layer is formed over a semiconductor substrate having an opening arranged within the dielectric layer. A metal seed layer is formed on the surfaces of the opening using a chemical vapor deposition (CVD) process. Then a metal layer is plated onto the metal seed layer to fill the opening. Forming the metal seed layer using a CVD process provides the seed layer with a good uniformity, which allows for high aspect ratio openings in the dielectric layer to be filled without voids or pinch off.

公开(公告)号：US20190101110A1

公开(公告)日：2019-04-04

申请号：US16207470

申请日：2018-12-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Surendra Babu Anantharaman ,  Wen-Cheng Yang ,  Chung-En Kao ,  Victor Y. Lu ,  Wei Chin

IPC: F04B37/08

Abstract: Cryogenic pump apparatuses include nanostructure material to achieve an ultra-high vacuum level. The nanostructure material can be mixed with either an adsorbent material or a fixed glue layer which is utilized to fix the adsorbent material. The nanostructure material's good thermal conductivity and adsorption properties help to lower working temperature and extend regeneration cycle of the cryogenic pumps.

公开(公告)号：US10157819B2

公开(公告)日：2018-12-18

申请号：US15834675

申请日：2017-12-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pu-Fang Chen ,  Victor Y. Lu

IPC: H01L23/48 ,  H01L25/00 ,  H01L21/324 ,  H01L21/768 ,  H01L23/532 ,  H01L25/065 ,  H01L29/32

Abstract: In a method of manufacturing a semiconductor device, a thermal treatment is performed on a substrate, thereby forming a defect free layer in an upper layer of the substrate, where a remaining layer of the substrate is a bulk layer. A density of defects in the bulk layer is equal to or more than 1×108 cm−3, where the defects are bulk micro defects. An electronic device is formed over the defect free layer. An opening is formed in the defect free layer such that the opening does not reach the bulk layer. The opening is filled with a conductive material, thereby forming a via. The bulk layer is removed so that a bottom part of the via is exposed. A density of defects in the defect free layer is less than 100 cm−3.

公开(公告)号：US20180096914A1

公开(公告)日：2018-04-05

申请号：US15834675

申请日：2017-12-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pu-Fang Chen ,  Victor Y. Lu

IPC: H01L23/48 ,  H01L25/00 ,  H01L25/065 ,  H01L23/532 ,  H01L21/768 ,  H01L21/324 ,  H01L29/32

CPC classification number: H01L23/481 ,  H01L21/324 ,  H01L21/76852 ,  H01L21/76898 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53271 ,  H01L25/0657 ,  H01L25/50 ,  H01L29/32 ,  H01L2225/06541

Abstract: In a method of manufacturing a semiconductor device, a thermal treatment is performed on a substrate, thereby forming a defect free layer in an upper layer of the substrate, where a remaining layer of the substrate is a bulk layer. A density of defects in the bulk layer is equal to or more than 1×108 cm−3, where the defects are bulk micro defects. An electronic device is formed over the defect free layer. An opening is formed in the defect free layer such that the opening does not reach the bulk layer. The opening is filled with a conductive material, thereby forming a via. The bulk layer is removed so that a bottom part of the via is exposed. A density of defects in the defect free layer is less than 100 cm−3.

公开(公告)号：US09899297B1

公开(公告)日：2018-02-20

申请号：US15281315

申请日：2016-09-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Pu-Fang Chen ,  Victor Y. Lu

IPC: H01L23/48 ,  H01L21/76 ,  H01L21/324 ,  H01L21/768 ,  H01L29/32 ,  H01L23/532 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/481 ,  H01L21/324 ,  H01L21/76852 ,  H01L21/76898 ,  H01L23/53238 ,  H01L25/0657 ,  H01L25/50 ,  H01L29/32 ,  H01L2225/06541

Abstract: In a method of manufacturing a semiconductor device, a thermal treatment is performed on a substrate, thereby forming a defect free layer in an upper layer of the substrate, where a remaining layer of the substrate is a bulk layer. A density of defects in the bulk layer is equal to or more than 1×108 cm−3, where the defects are bulk micro defects. An electronic device is formed over the defect free layer. An opening is formed in the defect free layer such that the opening does not reach the bulk layer. The opening is filled with a conductive material, thereby forming a via. The bulk layer is removed so that a bottom part of the via is exposed. A density of defects in the defect free layer is less than 100 cm−3.