公开(公告)号：US20180190810A1

公开(公告)日：2018-07-05

申请号：US15725091

申请日：2017-10-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kun-Mu LI ,  Liang-Yi CHEN ,  Wen-Chu HSIAO

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/76829 ,  H01L29/0649 ,  H01L29/0673 ,  H01L29/6656 ,  H01L29/66795

Abstract: A semiconductor device includes a gate structure formed over a channel region of the semiconductor device, a source/drain region adjacent the channel region, and an electrically conductive contact layer over the source/drain region. The source/drain region includes a first epitaxial layer having a first material composition and a second epitaxial layer formed over the first epitaxial layer. The second epitaxial layer has a second material composition different from the first composition. The electrically conductive contact layer is in contact with the first and second epitaxial layers. A bottom of the electrically conductive contact layer is located below an uppermost portion of the first epitaxial layer.

公开(公告)号：US20190280115A1

公开(公告)日：2019-09-12

申请号：US16417051

申请日：2019-05-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kun-Mu LI ,  Liang-Yi CHEN ,  Wen-Chu HSIAO

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08

Abstract: A semiconductor device includes a gate structure formed over a channel region of the semiconductor device, a source/drain region adjacent the channel region, and an electrically conductive contact layer over the source/drain region. The source/drain region includes a first epitaxial layer having a first material composition and a second epitaxial layer formed over the first epitaxial layer. The second epitaxial layer has a second material composition different from the first composition. The electrically conductive contact layer is in contact with the first and second epitaxial layers. A bottom of the electrically conductive contact layer is located below an uppermost portion of the first epitaxial layer.

公开(公告)号：US20190097006A1

公开(公告)日：2019-03-28

申请号：US16101897

申请日：2018-08-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kun-Mu LI ,  Wei-Yang LEE ,  Wen-Chu HSIAO

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/78 ,  H01L29/08 ,  H01L29/16 ,  H01L29/66 ,  H01L29/40 ,  H01L21/8234

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a first source/drain structure, and a contact structure. The gate structure has a gate dielectric layer over a first fin structure. The first source/drain structure is positioned in the first fin structure and adjacent to the gate structure. The first source/drain structure includes a first epitaxial layer in contact with the top surface of the first fin structure and a second epitaxial layer over the first epitaxial layer and extending above a bottom surface of the gate dielectric layer. The contact structure extends into the first source/drain structure. The top surface of the first fin structure is between a top surface and a bottom surface of the first source/drain structure.

公开(公告)号：US20160190320A1

公开(公告)日：2016-06-30

申请号：US14945542

申请日：2015-11-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Lai-Wan CHONG ,  Wen-Chu HSIAO ,  Ying-Min CHOU ,  Hsiang-Hsiang KO

IPC: H01L29/78 ,  H01L29/165 ,  H01L29/161 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L29/7848 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/04 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78

Abstract: A semiconductor structure that includes crystalline surfaces and amorphous hydrophilic surfaces is provided. The hydrophilic surfaces are treated with silane that includes a hydrophobic functional group, converting the hydrophilic surfaces to hydrophobic surfaces. Chemical vapor deposition or other suitable deposition methods are used to simultaneously deposit a material on both surfaces and due to the surface treatment, the deposited material exhibits superior adherence qualities on both surfaces. In one embodiment, the structure is an opening formed in a semiconductor substrate and bounded by at least one portion of a crystalline silicon surface and at least one portion of an amorphous silicon oxide structure.