公开(公告)号：US20190273023A1

公开(公告)日：2019-09-05

申请号：US15909762

申请日：2018-03-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Yip LOH ,  Chih-Wei CHANG ,  Hong-Mao LEE ,  Chun-Hsien HUANG ,  Yu-Ming HUANG ,  Yan-Ming TSAI ,  Yu-Shiuan WANG ,  Hung-Hsu CHEN ,  Yu-Kai CHEN ,  Yu-Wen CHENG

IPC: H01L21/768 ,  H01L21/8234 ,  H01L29/08 ,  H01L23/522

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.