公开(公告)号：US11569125B2

公开(公告)日：2023-01-31

申请号：US16912369

申请日：2020-06-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Allen Ke ,  Yi-Wei Chiu ,  Hung Jui Chang ,  Yu-Wei Kuo

IPC: H01L21/768 ,  H01L21/74 ,  H01L21/48 ,  H01L23/522 ,  H01L23/532

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

公开(公告)号：US20220093457A1

公开(公告)日：2022-03-24

申请号：US17542609

申请日：2021-12-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Allen Ke ,  Yi-Wei Chiu ,  Hung Jui Chang ,  Yu-Wei Kuo

IPC: H01L21/768 ,  H01L21/74 ,  H01L21/48 ,  H01L23/522 ,  H01L23/532

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

公开(公告)号：US10707123B2

公开(公告)日：2020-07-07

申请号：US15725972

申请日：2017-10-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Allen Ke ,  Yi-Wei Chiu ,  Hung Jui Chang ,  Yu-Wei Kuo

IPC: H01L21/768 ,  H01L21/74 ,  H01L21/48 ,  H01L23/522 ,  H01L23/532

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

公开(公告)号：US11854873B2

公开(公告)日：2023-12-26

申请号：US17542609

申请日：2021-12-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu Lun Ke ,  Yi-Wei Chiu ,  Hung Jui Chang ,  Yu-Wei Kuo

IPC: H01L21/768 ,  H01L21/74 ,  H01L21/48 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76849 ,  H01L21/4828 ,  H01L21/743 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2224/05093

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

公开(公告)号：US11195750B2

公开(公告)日：2021-12-07

申请号：US16202816

申请日：2018-11-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Allen Ke ,  Yi-Wei Chiu ,  Hung Jui Chang ,  Yu-Wei Kuo

IPC: H01L21/768 ,  H01L21/74 ,  H01L21/48 ,  H01L23/522 ,  H01L23/532

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.