Abstract:
A pod for transporting a cassette of semiconductor wafers that is equipped with a cover latch indicator is described. The pod is constructed by a base, a cover, a latch means and an indicator means. The base is used to support the cassette positioned thereon, while the cover removably carries on the base for protectively covering the cassette to prevent contamination of the wafers. The latch means is carried on the base for latching the cover onto the base. The latch means may be actuatable from a latched position in which the cover is latched onto the base to a released position allowing removal of the cover from the base. The indicator means is coupled with the latch means for providing a visual indication of the condition of the latch means.
Abstract:
A product comprising a micromirror comprising a reflective layer and a treatment layer overlying the reflective layer, and wherein the treatment layer comprises Ti.
Abstract:
A method for coating a thick spin-on-glass layer on a semiconductor structure without cracking problems and with improved planarization is disclosed. In the method, a pre-processed semiconductor structure that has a plurality of metal lines on top is first provided. After a first conformal layer of silicon oxide is deposited on top to insulate the metal lines, a first and a second layer of SOG are coated on top to a total thickness of at least 2500 null. On top of the second SOG layers, is then deposited a second layer of silicon oxide by a plasma enhanced oxide deposition technique to a thickness of at least 1000 null. A third and a fourth SOG layer are then coated on top of the stress buffer layer to a total thickness of at least 2500 null.
Abstract:
A wafer pod or container fitted with at least one magnifying lens for magnifying the size of a lot number or other identifying indicia typically inscribed on a wafer inside the pod or container. The magnifying lens enables quick and accurate visual identification of the wafers by lot number or other identifying indicia as the wafers are transported in a semiconductor wafer fabrication facility.