公开(公告)号：US20240356199A1

公开(公告)日：2024-10-24

申请号：US18762578

申请日：2024-07-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Pei-Hsuan Lee ,  Ching-Hua Hsieh ,  Chien-Ling Hwang ,  Yu-Ting Chiu ,  Jui-Chang Kuo

IPC分类号： H01Q1/22 ,  H01L21/48 ,  H01L23/00 ,  H01L23/66 ,  H01Q1/40

CPC分类号： H01Q1/2283 ,  H01L21/4846 ,  H01L23/66 ,  H01L24/13 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01Q1/40 ,  H01L2223/6677 ,  H01L2224/13024 ,  H01L2224/24101 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267

摘要： A method of manufacturing an electronic device includes: providing a composite structure, wherein the composite structure comprises a core dielectric layer with two conductive layers formed on two opposite surfaces of the core dielectric layer; thinning the two conductive layers to form two thinned conductive layers; forming an antenna pattern using one of the two thinned conductive layers; forming an antenna package to encapsulate the antenna pattern therein; forming a circuit pattern by patterning the other one of the two thinned conductive layers; and forming a chip package to encapsulate the circuit pattern therein, wherein the chip package is electrically coupled to the antenna package.

公开(公告)号：US20210351491A1

公开(公告)日：2021-11-11

申请号：US17383403

申请日：2021-07-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Pei-Hsuan Lee ,  Ching-Hua Hsieh ,  Chien-Ling Hwang ,  Yu-Ting Chiu ,  Jui-Chang Kuo

IPC分类号： H01Q1/22 ,  H01L23/00 ,  H01L21/48 ,  H01Q1/40 ,  H01L23/66

摘要： A method of manufacturing an electronic device includes providing a core dielectric layer with two conductive layers formed on two opposite surfaces of the core dielectric layer, and removing at least a portion of each of the two conductive layers to respectively form an antenna pattern and a circuit pattern of a chip package at the two opposite surfaces of the core dielectric layer.

公开(公告)号：US12062832B2

公开(公告)日：2024-08-13

申请号：US17383403

申请日：2021-07-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Pei-Hsuan Lee ,  Ching-Hua Hsieh ,  Chien-Ling Hwang ,  Yu-Ting Chiu ,  Jui-Chang Kuo

IPC分类号： H01L23/66 ,  H01L21/48 ,  H01L23/00 ,  H01Q1/22 ,  H01Q1/40

CPC分类号： H01Q1/2283 ,  H01L21/4846 ,  H01L23/66 ,  H01L24/13 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01Q1/40 ,  H01L2223/6677 ,  H01L2224/13024 ,  H01L2224/24101 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267

摘要： A method of manufacturing an electronic device includes providing a core dielectric layer with two conductive layers formed on two opposite surfaces of the core dielectric layer, and removing at least a portion of each of the two conductive layers to respectively form an antenna pattern and a circuit pattern of a chip package at the two opposite surfaces of the core dielectric layer.