公开(公告)号：US20230068359A1

公开(公告)日：2023-03-02

申请号：US17461426

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ruey-Wen Chang ,  Feng-Ming Chang ,  Ping-Wei Wang

IPC: H01L27/11 ,  H01L27/092 ,  G11C11/412

Abstract: A static random-access memory (SRAM) structure and the manufacturing method thereof are disclosed. An exemplary SRAM structure includes a first source/drain (S/D) feature and a second S/D feature formed in an interlayer dielectric layer (ILD) of a bit cell region of the SRAM structure, a frontside via electrically connecting to the first S/D feature, and a first backside via electrically connecting to the second S/D feature. The first S/D feature and the second S/D feature are of a same type.

公开(公告)号：US11675949B2

公开(公告)日：2023-06-13

申请号：US16722865

申请日：2019-12-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Feng-Ming Chang ,  Ruey-Wen Chang ,  Ping-Wei Wang ,  Sheng-Hsiung Wang ,  Chi-Yu Lu

IPC: H01L27/146 ,  G06F30/392 ,  H01L27/088 ,  G06F30/398 ,  H01L27/11

CPC classification number: G06F30/392 ,  G06F30/398 ,  H01L27/0886 ,  H01L27/1104

Abstract: A method includes laying out a standard cell region, with a rectangular space being within the standard cell region. The standard cell region includes a first row of standard cells having a first bottom boundary facing the rectangular space, and a plurality of standard cells having side boundaries facing the rectangular space. The plurality of standard cells include a bottom row of standard cells. A memory array is laid out in the rectangular space, and a second bottom boundary of the bottom row and a third bottom boundary of the memory array are aligned to a same straight line. A filler cell region is laid out in the rectangular space. The filler cell region includes a first top boundary contacting the first bottom boundary of the first row of standard cells, and a fourth bottom boundary contacting a second top boundary of the memory array.

公开(公告)号：US20200272781A1

公开(公告)日：2020-08-27

申请号：US16722865

申请日：2019-12-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Feng-Ming Chang ,  Ruey-Wen Chang ,  Ping-Wei Wang ,  Sheng-Hsiung Wang ,  Chi-Yu Lu

IPC: G06F30/392 ,  H01L27/11 ,  G06F30/398 ,  H01L27/088

Abstract: A method includes laying out a standard cell region, with a rectangular space being within the standard cell region. The standard cell region includes a first row of standard cells having a first bottom boundary facing the rectangular space, and a plurality of standard cells having side boundaries facing the rectangular space. The plurality of standard cells include a bottom row of standard cells. A memory array is laid out in the rectangular space, and a second bottom boundary of the bottom row and a third bottom boundary of the memory array are aligned to a same straight line. A filler cell region is laid out in the rectangular space. The filler cell region includes a first top boundary contacting the first bottom boundary of the first row of standard cells, and a fourth bottom boundary contacting a second top boundary of the memory array.