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公开(公告)号:US09917086B2
公开(公告)日:2018-03-13
申请号:US15357371
申请日:2016-11-21
发明人: Tsung-Yao Wen , Sai-Hooi Yeong , Sheng-chen Wang
IPC分类号: H01L27/088 , H01L29/66 , H01L21/8234 , H01L29/78 , H01L29/786 , H01L27/02
CPC分类号: H01L27/0886 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/823493 , H01L27/0207 , H01L29/66795 , H01L29/66818 , H01L29/785 , H01L29/78615
摘要: A semiconductor device includes a substrate and a fin over the substrate. The fin includes a source region, a drain region, a channel region, and a biasing region. The channel region and the biasing region sandwich one of the source and drain regions. The FinFET further includes a gate over the substrate. The gate engages the fin adjacent to the channel region, thereby forming a field effect transistor (FET). The biasing region is configured to bias the FET when a voltage is applied across the biasing region and the source region.
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公开(公告)号:US12002499B2
公开(公告)日:2024-06-04
申请号:US17868982
申请日:2022-07-20
发明人: Sheng-chen Wang , Meng-Han Lin , Chia-En Huang , Yi-Ching Liu
IPC分类号: G11C11/22 , H01L23/528 , H10B51/20 , H10B51/30
CPC分类号: G11C11/2259 , G11C11/223 , H01L23/528 , H10B51/20 , H10B51/30
摘要: Systems and methods disclosed herein are related to a memory system. In one aspect, the memory system includes a first set of memory cells including a first string of memory cells and a second string of memory cells; and a first switch including: a first electrode connected to first electrodes of the first string of memory cells and first electrodes of the second string of memory cells, and a second electrode connected to a first global bit line, wherein gate electrodes of the first string of memory cells are connected to a first word line and gate electrodes of the second string of memory cells are connected to a second word line.
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公开(公告)号:US20180197857A1
公开(公告)日:2018-07-12
申请号:US15916756
申请日:2018-03-09
发明人: Tsung-Yao Wen , Sai-Hooi Yeong , Sheng-chen Wang
IPC分类号: H01L27/088 , H01L21/8234 , H01L29/78 , H01L29/66 , H01L29/786 , H01L27/02
CPC分类号: H01L27/0886 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/823493 , H01L27/0207 , H01L29/66795 , H01L29/66818 , H01L29/785 , H01L29/78615
摘要: A semiconductor device includes multiple first fins oriented lengthwise along a first direction and multiple first gate structures oriented lengthwise along a second direction generally perpendicular to the first direction. Each of the first fins includes an end that is narrower than a main body of the respective first fin. The first gate structures are disposed over channel regions of the main body of the first fins to form multiple first FinFETs. The end of the first fins and the channel regions of the first fins sandwich some of source/drain regions of the first fins. The semiconductor device further includes a first contact disposed over and in electrical contact with the ends of the first fins.
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公开(公告)号:US10522540B2
公开(公告)日:2019-12-31
申请号:US16214403
申请日:2018-12-10
发明人: Tsung-Yao Wen , Sai-Hooi Yeong , Sheng-chen Wang
IPC分类号: H01L27/088 , H01L29/66 , H01L21/8234 , H01L29/78 , H01L29/786 , H01L27/02
摘要: A semiconductor device includes a semiconductor substrate; a semiconductor projection connected to the semiconductor substrate; and a gate engaging the semiconductor projection, wherein the semiconductor projection includes a first region and a second region, the second region is between the first region and the gate, and the first region is lower in height than the second region.
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公开(公告)号:US20220358985A1
公开(公告)日:2022-11-10
申请号:US17868982
申请日:2022-07-20
发明人: Sheng-chen Wang , Meng-Han Lin , Chia-En Huang , Yi-Ching Liu
IPC分类号: G11C11/22 , H01L27/1159 , H01L27/11597 , H01L23/528
摘要: Systems and methods disclosed herein are related to a memory system. In one aspect, the memory system includes a first set of memory cells including a first string of memory cells and a second string of memory cells; and a first switch including: a first electrode connected to first electrodes of the first string of memory cells and first electrodes of the second string of memory cells, and a second electrode connected to a first global bit line, wherein gate electrodes of the first string of memory cells are connected to a first word line and gate electrodes of the second string of memory cells are connected to a second word line.
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公开(公告)号:US20190115345A1
公开(公告)日:2019-04-18
申请号:US16214403
申请日:2018-12-10
发明人: Tsung-Yao Wen , Sai-Hooi Yeong , Sheng-chen Wang
IPC分类号: H01L27/088 , H01L21/8234 , H01L29/786 , H01L29/78 , H01L29/66
CPC分类号: H01L27/0886 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/823493 , H01L27/0207 , H01L29/66795 , H01L29/66818 , H01L29/785 , H01L29/78615
摘要: A semiconductor device includes a semiconductor substrate; a semiconductor projection connected to the semiconductor substrate; and a gate engaging the semiconductor projection, wherein the semiconductor projection includes a first region and a second region, the second region is between the first region and the gate, and the first region is lower in height than the second region.
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公开(公告)号:US10163902B2
公开(公告)日:2018-12-25
申请号:US15916756
申请日:2018-03-09
发明人: Tsung-Yao Wen , Sai-Hooi Yeong , Sheng-chen Wang
IPC分类号: H01L27/088 , H01L29/66 , H01L21/8234 , H01L29/78 , H01L29/786 , H01L27/02
摘要: A semiconductor device includes multiple first fins oriented lengthwise along a first direction and multiple first gate structures oriented lengthwise along a second direction generally perpendicular to the first direction. Each of the first fins includes an end that is narrower than a main body of the respective first fin. The first gate structures are disposed over channel regions of the main body of the first fins to form multiple first FinFETs. The end of the first fins and the channel regions of the first fins sandwich some of source/drain regions of the first fins. The semiconductor device further includes a first contact disposed over and in electrical contact with the ends of the first fins.
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公开(公告)号:US20170069629A1
公开(公告)日:2017-03-09
申请号:US15357371
申请日:2016-11-21
发明人: Tsung-Yao Wen , Sai-Hooi Yeong , Sheng-chen Wang
IPC分类号: H01L27/088 , H01L21/8234
CPC分类号: H01L27/0886 , H01L21/823418 , H01L21/823431 , H01L21/823481 , H01L21/823493 , H01L27/0207 , H01L29/66795 , H01L29/66818 , H01L29/785 , H01L29/78615
摘要: A semiconductor device includes a substrate and a fin over the substrate. The fin includes a source region, a drain region, a channel region, and a biasing region. The channel region and the biasing region sandwich one of the source and drain regions. The FinFET further includes a gate over the substrate. The gate engages the fin adjacent to the channel region, thereby forming a field effect transistor (FET). The biasing region is configured to bias the FET when a voltage is applied across the biasing region and the source region.
摘要翻译: 半导体器件包括衬底和衬底上的鳍。 鳍包括源极区,漏极区,沟道区和偏置区。 沟道区域和偏置区域夹着源区和漏区之一。 FinFET还包括在衬底上的栅极。 栅极接近与沟道区相邻的鳍,从而形成场效应晶体管(FET)。 偏置区域被配置为当跨越偏置区域和源极区域施加电压时偏置FET。
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