公开(公告)号：US20240274179A1

公开(公告)日：2024-08-15

申请号：US18647743

申请日：2024-04-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Chen Wang ,  Meng-Han Lin ,  Chia-En Huang ,  Yi-Ching Liu

IPC分类号： G11C11/22 ,  H01L23/528 ,  H10B51/20 ,  H10B51/30

CPC分类号： G11C11/2259 ,  G11C11/223 ,  H01L23/528 ,  H10B51/20 ,  H10B51/30

摘要： Systems and methods disclosed herein are related to a memory system. In one aspect, the memory system includes a first set of memory cells including a first string of memory cells and a second string of memory cells; and a first switch including: a first electrode connected to first electrodes of the first string of memory cells and first electrodes of the second string of memory cells, and a second electrode connected to a first global bit line, wherein gate electrodes of the first string of memory cells are connected to a first word line and gate electrodes of the second string of memory cells are connected to a second word line.

公开(公告)号：US12029042B2

公开(公告)日：2024-07-02

申请号：US17470826

申请日：2021-09-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Peng-Chun Liou ,  Zhiqiang Wu ,  Chung-Wei Wu ,  Yi-Ching Liu ,  Chia-En Huang

IPC分类号： H10B51/20 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L29/10

CPC分类号： H10B51/20 ,  H01L21/76804 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5283 ,  H01L29/105

摘要： A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structuring extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The semiconductor device further comprises a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the plurality of third conductive structures and the first conductive structure and between the plurality of third conductive structures and the second conductive structure. The first and second conductive structures each have a varying width along the lateral direction, and the first semiconductor channel has a doping concentration varying along the vertical direction.

公开(公告)号：US11823769B2

公开(公告)日：2023-11-21

申请号：US17460216

申请日：2021-08-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Sheng Chang ,  Chia-En Huang ,  Yi-Ching Liu ,  Yih Wang

IPC分类号： G11C7/12 ,  G11C5/14 ,  G11C5/02 ,  H01L27/06

CPC分类号： G11C7/12 ,  G11C5/025 ,  G11C5/14 ,  H01L27/0688

摘要： Disclosed herein are related to a memory array. In one aspect, the memory array includes a first set of memory cells including a first subset of memory cells and a second subset of memory cells. In one aspect, the memory array includes a first switch including a first electrode connected to first electrodes of the first subset of memory cells, and a second electrode connected to a first global line. In one aspect, the memory array includes a second switch including a first electrode connected to first electrodes of the second subset of memory cells, and a second electrode connected to the first global line.

公开(公告)号：US20230326510A1

公开(公告)日：2023-10-12

申请号：US18336386

申请日：2023-06-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Peng-Chun Liou ,  Zhiqiang Wu ,  Chung-Wei Wu ,  Yi-Ching Liu ,  Yih Wang

IPC分类号： G11C11/22 ,  H10B51/20

CPC分类号： G11C11/2257 ,  H10B51/20 ,  G11C11/2297 ,  G11C11/2255

摘要： A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures are configured to be applied with respective different voltages in accordance with the varying width of the first and second conductive structures.

公开(公告)号：US11744080B2

公开(公告)日：2023-08-29

申请号：US17121757

申请日：2020-12-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Han Lin ,  Han-Jong Chia ,  Yi-Ching Liu ,  Chia-En Huang ,  Sheng-Chen Wang ,  Feng-Cheng Yang ,  Chung-Te Lin

IPC分类号： H10B51/20 ,  G11C7/18 ,  G11C8/14 ,  H01L23/522 ,  H10B51/10 ,  H10B51/30

CPC分类号： H10B51/20 ,  G11C7/18 ,  G11C8/14 ,  H01L23/5226 ,  H10B51/10 ,  H10B51/30

摘要： A memory device, a semiconductor device and manufacturing methods for forming the memory device and the semiconductor device are provided. The memory device include a stacking structure, a switching layer, channel layers and pairs of conductive pillars. The stacking structure includes alternately stacked isolation layers and word lines, and extends along a first direction. The stacking structure has a staircase portion and a connection portion at an edge region of the stacking structure. The connection portion extends along the staircase portion and located aside the staircase portion, and may not be shaped into a staircase structure. The switching layer covers a sidewall of the stacking structure. The channel layers cover a sidewall of the switching layer, and are laterally spaced apart from one another along the first direction. The pairs of conductive pillars stand on the substrate, and in lateral contact with the switching layer through the channel layers.

公开(公告)号：US20220285400A1

公开(公告)日：2022-09-08

申请号：US17470826

申请日：2021-09-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Peng-Chun Liou ,  Zhiqiang Wu ,  Chung-Wei Wu ,  Yi-Ching Liu ,  Chia-En Huang

IPC分类号： H01L27/11597 ,  H01L23/522 ,  H01L23/528 ,  H01L29/10 ,  H01L21/768

摘要： A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structuring extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The semiconductor device further comprises a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the plurality of third conductive structures and the first conductive structure and between the plurality of third conductive structures and the second conductive structure. The first and second conductive structures each have a varying width along the lateral direction, and the first semiconductor channel has a doping concentration varying along the vertical direction.

公开(公告)号：US20220285399A1

公开(公告)日：2022-09-08

申请号：US17458692

申请日：2021-08-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Peng-Chun Liou ,  Zhiqiang Wu ,  Ya-Yun Cheng ,  Yi-Ching Liu ,  Meng-Han Lin

IPC分类号： H01L27/11597 ,  H01L27/1159

摘要： A semiconductor device includes a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a first lateral direction. The semiconductor device includes third conductive structures each extending along the first lateral direction. The third conductive structures are disposed across the first and second conductive structures. The semiconductor device includes a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the third conductive structures and the first conductive structure, and between the third conductive structures and the second conductive structure. The first and second conductive structures each have a first varying width along the first lateral direction, and the first semiconductor channel has a second varying width along a second lateral direction.

公开(公告)号：US20220028893A1

公开(公告)日：2022-01-27

申请号：US17121757

申请日：2020-12-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Han Lin ,  Han-Jong Chia ,  Yi-Ching Liu ,  Chia-En Huang ,  Sheng-Chen Wang ,  Feng-Cheng Yang ,  Chung-Te Lin

IPC分类号： H01L27/11597 ,  H01L27/11587 ,  G11C7/18 ,  G11C8/14 ,  H01L27/1159 ,  H01L23/522

摘要： A memory device, a semiconductor device and manufacturing methods for forming the memory device and the semiconductor device are provided. The memory device include a stacking structure, a switching layer, channel layers and pairs of conductive pillars. The stacking structure includes alternately stacked isolation layers and word lines, and extends along a first direction. The stacking structure has a staircase portion and a connection portion at an edge region of the stacking structure. The connection portion extends along the staircase portion and located aside the staircase portion, and may not be shaped into a staircase structure. The switching layer covers a sidewall of the stacking structure. The channel layers cover a sidewall of the switching layer, and are laterally spaced apart from one another along the first direction. The pairs of conductive pillars stand on the substrate, and in lateral contact with the switching layer through the channel layers.

公开(公告)号：US20240341075A1

公开(公告)日：2024-10-10

申请号：US18296010

申请日：2023-04-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Peng-Chun Liou ,  Ya-Yun Cheng ,  Chia-En Huang ,  Yi-Ching Liu ,  Zhiqiang Wu ,  Yih Wang

IPC分类号： H10B12/00

CPC分类号： H10B12/00

摘要： A semiconductor device includes a conductive layer extending along a first lateral direction; a gate dielectric layer disposed over the conductive layer; a channel layer disposed over the gate dielectric layer and extending along a second lateral direction perpendicular to the first lateral direction; a first via-like structure, in direct contact with the channel layer, that is disposed along a first edge of the first channel extending along the second lateral direction; and a second via-like structure, in direct contact with the channel layer, that is disposed along a second, opposite edge of the first channel extending along the second lateral direction. The first via-like structure and second via-like structure are laterally separated apart along a third lateral direction that is clockwise tilted from the second lateral direction with a first positive angle.

公开(公告)号：US11856786B2

公开(公告)日：2023-12-26

申请号：US17347596

申请日：2021-06-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Bo-Feng Young ,  Yi-Ching Liu ,  Sai-Hooi Yeong ,  Yih Wang ,  Yu-Ming Lin

IPC分类号： H10B51/40 ,  H10B51/20 ,  G11C11/22 ,  H01L23/522 ,  H10B43/40 ,  H10B43/50 ,  H10B51/30 ,  H10B51/50 ,  H10B43/30

CPC分类号： H10B51/40 ,  G11C11/2257 ,  H01L23/5226 ,  H10B43/30 ,  H10B43/40 ,  H10B43/50 ,  H10B51/20 ,  H10B51/30 ,  H10B51/50

摘要： An integrated circuit is provided. The integrated circuit includes a three-dimensional memory device, a first word line driving circuit and a second word line driving circuit. The three-dimensional memory device includes stacking structures separately extending along a column direction. Each stacking structure includes a stack of word lines. The stacking structures have first staircase structures at a first side and second staircase structures at a second side. The word lines extend to steps of the first and second staircase structures. The first and second word line driving circuits lie below the three-dimensional memory device, and extend along the first and second sides, respectively. Some of the word lines in each stacking structure are routed to the first word line driving circuit from a first staircase structure, and others of the word lines in each stacking structure are routed to the second word line driving circuit from a second staircase structure.