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公开(公告)号:US20140233303A1
公开(公告)日:2014-08-21
申请号:US14266457
申请日:2014-04-30
发明人: Yi-Tzu Chen , Wei-jer Hsieh , Tsai-Hsin Lai , Ling-Fang Hsu , Hau-Tai Shieh
IPC分类号: G11C11/418
CPC分类号: G11C11/418 , G11C7/1012 , G11C7/18 , G11C11/413
摘要: An SRAM multiplexing apparatus comprise a plurality of local multiplexers and a global multiplexer. Each local multiplexer is coupled to a memory bank. The global multiplexer has a plurality of inputs, each of which is coupled to a corresponding output of the plurality of local multiplexers. In response to a decoded address in a read operation, an input of a local multiplexer is forwarded to a corresponding input of the global multiplexer. Similarly, the decoded address allows the global multiplexer to forward the input signal to a data out port via a buffer.
摘要翻译: SRAM多路复用装置包括多个本地多路复用器和全局多路复用器。 每个本地多路复用器耦合到存储体。 全局多路复用器具有多个输入,每个输入耦合到多个本地多路复用器的相应输出端。 响应于读操作中的解码地址,本地多路复用器的输入被转发到全局多路复用器的相应输入端。 类似地,解码的地址允许全局多路复用器经由缓冲器将输入信号转发到数据输出端口。
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公开(公告)号:US09208857B2
公开(公告)日:2015-12-08
申请号:US14266457
申请日:2014-04-30
发明人: Yi-Tzu Chen , Wei-jer Hsieh , Tsai-Hsin Lai , Ling-Fang Hsu , Hau-Tai Shieh
IPC分类号: G11C7/10 , G11C11/418 , G11C11/413 , G11C7/18
CPC分类号: G11C11/418 , G11C7/1012 , G11C7/18 , G11C11/413
摘要: An SRAM multiplexing apparatus comprise a plurality of local multiplexers and a global multiplexer. Each local multiplexer is coupled to a memory bank. The global multiplexer has a plurality of inputs, each of which is coupled to a corresponding output of the plurality of local multiplexers. In response to a decoded address in a read operation, an input of a local multiplexer is forwarded to a corresponding input of the global multiplexer. Similarly, the decoded address allows the global multiplexer to forward the input signal to a data out port via a buffer.
摘要翻译: SRAM多路复用装置包括多个本地多路复用器和全局多路复用器。 每个本地多路复用器耦合到存储体。 全局多路复用器具有多个输入,每个输入耦合到多个本地多路复用器的相应输出端。 响应于读操作中的解码地址,本地多路复用器的输入被转发到全局多路复用器的相应输入端。 类似地,解码的地址允许全局多路复用器经由缓冲器将输入信号转发到数据输出端口。
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