SYSTEM AND METHOD FOR SEMICONDUCTOR TOPOGRAPHY SIMULATIONS

    公开(公告)号:US20240378715A1

    公开(公告)日:2024-11-14

    申请号:US18776565

    申请日:2024-07-18

    Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of a physical structure by a central processing unit (CPU), generating a batch of particles, simulating a flight path of one of the particles with a ray-tracing method by a parallel processing thread in a graphics processing unit (GPU), identifying a surface normal of a voxel unit in the voxel mesh that intersects the flight path by the parallel processing thread in the GPU, passing parameters describing the one of the particles hitting the voxel mesh from the GPU to the CPU, determining a surface reaction between the one of the particles and the voxel unit by the CPU, and updating the voxel mesh based on the determining of the surface reaction.

    MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME

    公开(公告)号:US20240381783A1

    公开(公告)日:2024-11-14

    申请号:US18778989

    申请日:2024-07-21

    Abstract: An MRAM cell block and a magnetic shielding structure for the MRAM cell block are incorporated into a metal interconnect of an integrated circuit (IC) device. The magnetic shielding structure may be provided by metallization layers and via layers having wires and vias that incorporate a magnetic shielding material. The magnetic shielding material may form the wires and vias, form a liner around the wires, or may be a layer of the wires. The wires and vias may also include a metal that is more conductive than the magnetic shielding material. The metal interconnect may include layers above or below the magnetic shielding structure that lack the magnetic shielding material and are more conductive. The MRAM cell block with the magnetic shielding structure is optionally provided as a standalone memory device or incorporated into a 3-D IC device that includes a second substrate having a conventional metal interconnect.

    MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME

    公开(公告)号:US20230123764A1

    公开(公告)日:2023-04-20

    申请号:US17591141

    申请日:2022-02-02

    Abstract: An MRAM cell block and a magnetic shielding structure for the MRAM cell block are incorporated into a metal interconnect of an integrated circuit (IC) device. The magnetic shielding structure may be provided by metallization layers and via layers having wires and vias that incorporate a magnetic shielding material. The magnetic shielding material may form the wires and vias, form a liner around the wires, or may be a layer of the wires. The wires and vias may also include a metal that is more conductive than the magnetic shielding material. The metal interconnect may include layers above or below the magnetic shielding structure that lack the magnetic shielding material and are more conductive. The MRAM cell block with the magnetic shielding structure is optionally provided as a standalone memory device or incorporated into a 3-D IC device that includes a second substrate having a conventional metal interconnect.

Patent Agency Ranking