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公开(公告)号:US08951909B2
公开(公告)日:2015-02-10
申请号:US13801676
申请日:2013-03-13
发明人: Cheng-Hui Weng , Chun-Chieh Lin , Hung-Wen Su
IPC分类号: H01L21/76 , H01L21/768 , H01L23/528
CPC分类号: H01L23/528 , H01L21/76834 , H01L21/76849 , H01L21/76883 , H01L21/76885 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要: One or more integrated circuit structures and techniques for forming such integrated circuit structures are provided. The integrated circuit structures comprise a conductive structure that is formed within a trench in a dielectric layer on a substrate. The conductive structure is formed over a barrier layer formed within the trench, or the conductive structure is formed over a liner formed over the barrier layer. At least some of the dielectric layer, the barrier layer, the liner and the conductive structure are removed, for example, by chemical mechanical polishing, such that a step height exists between a top surface of the substrate and a top surface of the dielectric layer. Removing these layers in this manner removes areas where undesired interlayer peeling is likely to occur. A conductive cap is formed on the conductive structure.
摘要翻译: 提供了一种或多种用于形成这种集成电路结构的集成电路结构和技术。 集成电路结构包括形成在衬底上的电介质层的沟槽内的导电结构。 导电结构形成在形成在沟槽内的阻挡层上,或者导电结构形成在形成在阻挡层上的衬垫之上。 介电层,阻挡层,衬垫和导电结构中的至少一些例如通过化学机械抛光被去除,使得在衬底的顶表面和介电层的顶表面之间存在台阶高度 。 以这种方式去除这些层去除可能发生不期望的层间剥离的区域。 导电盖形成在导电结构上。
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公开(公告)号:US12080594B2
公开(公告)日:2024-09-03
申请号:US17872144
申请日:2022-07-25
发明人: Cheng-Lun Tsai , Huei-Wen Hsieh , Chun-Sheng Chen , Kai-Shiang Kuo , Jen-Wei Liu , Cheng-Hui Weng , Chun-Chieh Lin , Hung-Wen Su
IPC分类号: H01L21/768 , H01L23/532
CPC分类号: H01L21/76846 , H01L21/76862 , H01L21/76877 , H01L23/53238
摘要: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
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公开(公告)号:US20140264864A1
公开(公告)日:2014-09-18
申请号:US13801676
申请日:2013-03-13
发明人: Cheng-Hui Weng , Chun-Chieh Lin , Hung-Wen Su
IPC分类号: H01L21/768 , H01L23/528
CPC分类号: H01L23/528 , H01L21/76834 , H01L21/76849 , H01L21/76883 , H01L21/76885 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要: One or more integrated circuit structures and techniques for forming such integrated circuit structures are provided. The integrated circuit structures comprise a conductive structure that is formed within a trench in a dielectric layer on a substrate. The conductive structure is formed over a barrier layer formed within the trench, or the conductive structure is formed over a liner formed over the barrier layer. At least some of the dielectric layer, the barrier layer, the liner and the conductive structure are removed, for example, by chemical mechanical polishing, such that a step height exists between a top surface of the substrate and a top surface of the dielectric layer. Removing these layers in this manner removes areas where undesired interlayer peeling is likely to occur. A conductive cap is formed on the conductive structure.
摘要翻译: 提供了一种或多种用于形成这种集成电路结构的集成电路结构和技术。 集成电路结构包括形成在衬底上的电介质层的沟槽内的导电结构。 导电结构形成在形成在沟槽内的阻挡层上,或者导电结构形成在形成在阻挡层上的衬垫之上。 介电层,阻挡层,衬垫和导电结构中的至少一些例如通过化学机械抛光被去除,使得在衬底的顶表面和介电层的顶表面之间存在台阶高度 。 以这种方式去除这些层去除可能发生不期望的层间剥离的区域。 导电盖形成在导电结构上。
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公开(公告)号:US11430692B2
公开(公告)日:2022-08-30
申请号:US16941751
申请日:2020-07-29
发明人: Cheng-Lun Tsai , Huei-Wen Hsieh , Chun-Sheng Chen , Kai-Shiang Kuo , Jen-Wei Liu , Cheng-Hui Weng , Chun-Chieh Lin , Hung-Wen Su
IPC分类号: H01L21/768 , H01L23/532
摘要: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
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