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公开(公告)号：US07742747B2
公开(公告)日：2010-06-22
申请号：US11626964
申请日：2007-01-25
CPC分类号： H04B1/12 , H03D2200/0045 , H04B17/21
摘要： An integrated automatic IIP2 calibration architecture for wireless transceivers is disclosed. The architecture enables a wireless transceiver to generate a test radio frequency (RF) signal having a second order tone with minimal additional circuitry. In particular, the test RF signal is generated using a combination of native transceiver circuits and test adaptor circuits. Native transceiver circuits are those circuits implemented on the transceiver chip for executing native transceiver functions during normal operation, which can be used for generating the test (RF) signal. Test adaptor circuits are added to the transceiver chip, more specifically to the native circuits, for enabling the native circuits to generate the test RF signal in a self-test mode of operation. Circuits for implementing a particular IIP2 minimizing scheme can be included on the transceiver chip for automatic IIP2 calibration during the self-test mode of operation.
摘要翻译： 公开了一种用于无线收发器的综合自动IIP2校准架构。 该架构使得无线收发器能够生成具有最小附加电路的具有二阶音调的测试射频（RF）信号。 特别地，使用本机收发器电路和测试适配器电路的组合产生测试RF信号。 本地收发器电路是在收发器芯片上实现的用于在正常操作期间执行本机收发器功能的那些电路，其可用于产生测试（RF）信号。 测试适配器电路被添加到收发器芯片中，更具体地被添加到本地电路，用于使得本机电路能够以自测试操作模式生成测试RF信号。 用于实现特定的IIP2最小化方案的电路可以在自检操作模式下在收发器芯片中包括在自动IIP2校准中。
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公开(公告)号：US20080182537A1
公开(公告)日：2008-07-31
申请号：US11626964
申请日：2007-01-25
IPC分类号： H04B17/00
CPC分类号： H04B1/12 , H03D2200/0045 , H04B17/21
摘要： An integrated automatic IIP2 calibration architecture for wireless transceivers is disclosed. The architecture enables a wireless transceiver to generate a test radio frequency (RF) signal having a second order tone with minimal additional circuitry. In particular, the test RF signal is generated using a combination of native transceiver circuits and test adaptor circuits. Native transceiver circuits are those circuits implemented on the transceiver chip for executing native transceiver functions during normal operation, which can be used for generating the test (RF) signal. Test adaptor circuits are added to the transceiver chip, more specifically to the native circuits, for enabling the native circuits to generate the test RF signal in a self-test mode of operation. Circuits for implementing a particular IIP2 minimizing scheme can be included on the transceiver chip for automatic IIP2 calibration during the self-test mode of operation.
摘要翻译： 公开了一种用于无线收发器的综合自动IIP2校准架构。 该架构使得无线收发器能够生成具有最小附加电路的具有二阶音调的测试射频（RF）信号。 特别地，使用本机收发器电路和测试适配器电路的组合产生测试RF信号。 本地收发器电路是在收发器芯片上实现的用于在正常操作期间执行本机收发器功能的那些电路，其可用于产生测试（RF）信号。 测试适配器电路被添加到收发器芯片中，更具体地被添加到本地电路，用于使得本机电路能够以自测试操作模式生成测试RF信号。 用于实现特定的IIP2最小化方案的电路可以在自检操作模式下在收发器芯片中包括在自动IIP2校准中。
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公开(公告)号：US20100029228A1
公开(公告)日：2010-02-04
申请号：US12520518
申请日：2007-12-20
申请人： Alan Holden , Hamid Safiri , Michel J.G.J.P. Frechette , Sherif H.K. Embabi , Abdellatif Bellaouar , Stephen Arnold Devison , Tajinder Manku
发明人： Alan Holden , Hamid Safiri , Michel J.G.J.P. Frechette , Sherif H.K. Embabi , Abdellatif Bellaouar , Stephen Arnold Devison , Tajinder Manku
IPC分类号： H04B1/04
CPC分类号： H03G3/3047
摘要： A power ramping circuit for use in the transmit path of a radio frequency (RF) circuit. The power ramping circuit includes parallel connected transistors used as logarithmic resistor attenuators for adjusting current to a mixer circuit in the transmit path. The parallel connected transistors can be sized differently, and are sequentially turned off to gradually increase the current provided to the mixer circuit. A ramp control circuit controls the parallel connected transistors in response to either an analog signal or a digital signal.
摘要翻译： 一种用于射频（RF）电路的发射路径的功率斜坡电路。 功率斜坡电路包括并联的晶体管，用作对数电阻衰减器，用于调节到发射路径中的混频器电路的电流。 并联连接的晶体管的尺寸可以不同，并被依次关闭，以逐渐增加提供给混频器电路的电流。 斜坡控制电路响应于模拟信号或数字信号来控制并联的晶体管。
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公开(公告)号：US07623000B2
公开(公告)日：2009-11-24
申请号：US11778849
申请日：2007-07-17
CPC分类号： H03C5/00
摘要： The invention is directed at a hybrid modulation apparatus which combines a polar modulation circuit and a linear modulation circuit. The hybrid apparatus allows a communications device to function as a polar or a linear modulation circuit with less components as the output of the linear modulation circuit is an input of the polar modulation circuit.
摘要翻译： 本发明涉及组合极性调制电路和线性调制电路的混合调制装置。 混合设备允许通信设备用作具有较少组件的极性或线性调制电路，因为线性调制电路的输出是极坐标调制电路的输入。
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公开(公告)号：US08472552B2
公开(公告)日：2013-06-25
申请号：US12520486
申请日：2007-12-14
IPC分类号： H04L27/00
CPC分类号： H03M1/68 , H03M1/745 , H03M3/50 , H03M7/3004
摘要： A digital linear transmitter for digital to analog conversion of a radio frequency signal. The transmitter includes a delta sigma (ΔΣ) digital to analog converter (DAC) and a weighted signal digital to analog converter in the transmit path of a wireless device to reduce reliance on relatively large analog components. The ΔΣ DAC converts the lowest significant bits of the oversampled signal while the weighted signal digital to analog converter converts the highest significant bits of the oversampled signal. The transmitter core includes components for providing an oversampled modulated digital signal which is then subjected to first order filtering of the oversampled signal prior to generating a corresponding analog signal. The apparatus and method reduces analog components and increases digital components in transmitter core architecture of wireless RF devices.
摘要翻译： 一种用于数字到模拟转换射频信号的数字线性发射机。 发射机在无线设备的发射路径中包括Δ西格玛（DeltaSigma）数模转换器（DAC）和加权信号数模转换器，以减少对相对大的模拟组件的依赖。 DeltaSigma DAC转换过采样信号的最低有效位，而加权信号数模转换器转换过采样信号的最高有效位。 发射机核心包括用于提供过采样的调制数字信号的组件，然后在产生相应的模拟信号之前对过采样信号进行一阶滤波。 该装置和方法减少了模拟组件并增加了无线RF设备的发射机核心架构中的数字组件。
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6.发明授权Passive transmitter architecture with switchable outputs for wireless applications 有权无源发射机架构，具有可切换输出，适用于无线应用公开(公告)号：US08724736B2
公开(公告)日：2014-05-13
申请号：US13062604
申请日：2009-09-08
IPC分类号： H04L25/49
CPC分类号： H03F3/245 , H03F1/0261 , H03F1/0277 , H03F3/195 , H03F3/211 , H03F3/45188 , H03F3/45659 , H03F3/72 , H03F2200/372 , H03F2200/451 , H03F2200/541 , H03F2203/21142 , H03F2203/21175 , H03F2203/21178 , H03F2203/45418 , H03F2203/45424 , H03F2203/45544 , H03F2203/45634 , H03F2203/45726 , H03F2203/7236 , H03G3/001
摘要： A transmitter architecture having a single signal path or hardware to cover WCDMA/EDGE/GSM applications, and requires no SAW at the transmitter outputs. The transmitter architecture allows for a transmit convergence feature. A passive mixer with unique driver and furthermore using native devices available from the CMOS process for the mixer cores enables low voltage and low power design, low output noise and high linearity. A digital variable gain amplifier has the capability to cover wide output dynamic range operated from low supply voltage and interfaced digitally with the baseband circuit without DAC. A single transformer is used to combine the outputs from the WCDMA/EDGE and GSM drivers and subsequently convert the differential signal paths into a single-ended signal. RF switches are used to divert the output from the transformer to different bands and applications.
摘要翻译： 具有覆盖WCDMA / EDGE / GSM应用的单个信号路径或硬件的发射机架构，并且在发射机输出端不需要SAW。 发射机架构允许发送收敛功能。 具有独特驱动器的无源混频器，此外还可使用CMOS工艺的混频器内核提供的本机器件，可实现低电压和低功耗设计，低输出噪声和高线性度。 数字可变增益放大器具有覆盖从低电源电压操作的宽输出动态范围并与没有DAC的基带电路数字接口的能力。 单个变压器用于组合来自WCDMA / EDGE和GSM驱动器的输出，随后将差分信号路径转换为单端信号。 RF开关用于将变压器的输出转移到不同的频带和应用。
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公开(公告)号：US08509290B2
公开(公告)日：2013-08-13
申请号：US12520448
申请日：2007-12-21
IPC分类号： H04B1/38
CPC分类号： H03G3/3047 , H04B2001/0416
摘要： A closed loop power output calibration system for variable power output wireless devices. The wireless device includes a wireless transceiver having a transmit core coupled to a discrete power amplifier. Power detection circuitry formed in the wireless transceiver provides a detected power level of the power amplifier, and a reference power level, both of which are converted to digital signals using existing I and Q signal analog to digital converters in the receiver core. The digital signals are processed to cancel power distortion and temperature effects to provide a resulting power feedback signal. Corrective control signals are generated in response to the power feedback signal relative to a desired power output level. The gain in the transmit core is then adjusted in response to the corrective control signals such that the power amplifier outputs the target output power level.
摘要翻译： 一种用于可变功率输出无线设备的闭环功率输出校准系统。 无线设备包括具有耦合到分立功率放大器的发射芯的无线收发器。 在无线收发器中形成的功率检测电路提供功率放大器的检测功率电平和参考功率电平，两者都使用接收机核心中现有的I和Q信号模数转换器转换成数字信号。 处理数字信号以消除功率失真和温度影响，以提供最终的功率反馈信号。 响应于功率反馈信号相对于期望的功率输出电平产生校正控制信号。 然后响应于校正控制信号调整发送内核中的增益，使得功率放大器输出目标输出功率电平。
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8.发明申请PASSIVE TRANSMITTER ARCHITECTURE WITH SWITCHABLE OUTPUTS FOR WIRELESS APPLICATIONS 有权无源应用的可切换输出的被动发射机结构公开(公告)号：US20110249770A1
公开(公告)日：2011-10-13
申请号：US13062604
申请日：2009-09-08
IPC分类号： H04B1/04
CPC分类号： H03F3/245 , H03F1/0261 , H03F1/0277 , H03F3/195 , H03F3/211 , H03F3/45188 , H03F3/45659 , H03F3/72 , H03F2200/372 , H03F2200/451 , H03F2200/541 , H03F2203/21142 , H03F2203/21175 , H03F2203/21178 , H03F2203/45418 , H03F2203/45424 , H03F2203/45544 , H03F2203/45634 , H03F2203/45726 , H03F2203/7236 , H03G3/001
摘要： A transmitter architecture having a single signal path or hardware to cover WCDMA/EDGE/GSM applications, and requires no SAW at the transmitter outputs. The transmitter architecture allows for a transmit convergence feature. A passive mixer with unique driver and furthermore using native devices available from the CMOS process for the mixer cores enables low voltage and low power design, low output noise and high linearity. A digital variable gain amplifier has the capability to cover wide output dynamic range operated from low supply voltage and interfaced digitally with the baseband circuit without DAC. A single transformer is used to combine the outputs from the WCDMA/EDGE and GSM drivers and subsequently convert the differential signal paths into a single-ended signal. RF switches are used to divert the output from the transformer to different bands and applications.
摘要翻译： 具有覆盖WCDMA / EDGE / GSM应用的单个信号路径或硬件的发射机架构，并且在发射机输出端不需要SAW。 发射机架构允许发送收敛功能。 具有独特驱动器的无源混频器，此外还可使用CMOS工艺的混频器内核提供的本机器件，可实现低电压和低功耗设计，低输出噪声和高线性度。 数字可变增益放大器具有覆盖从低电源电压操作的宽输出动态范围并与没有DAC的基带电路数字接口的能力。 单个变压器用于组合来自WCDMA / EDGE和GSM驱动器的输出，随后将差分信号路径转换为单端信号。 RF开关用于将变压器的输出转移到不同的频带和应用。
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公开(公告)号：US20100027711A1
公开(公告)日：2010-02-04
申请号：US12520486
申请日：2007-12-14
CPC分类号： H03M1/68 , H03M1/745 , H03M3/50 , H03M7/3004
摘要： A digital linear transmitter for digital to analog conversion of a radio frequency signal. The transmitter includes a delta sigma (ΔΣ) digital to analog converter (DAC) and a weighted signal digital to analog converter in the transmit path of a wireless device to reduce reliance on relatively large analog components. The ΔΣ DAC converts the lowest significant bits of the oversampled signal while the weighted signal digital to analog converter converts the highest significant bits of the oversampled signal. The transmitter core includes components for providing an oversampled modulated digital signal which is then subjected to first order filtering of the oversampled signal prior to generating a corresponding analog signal. The apparatus and method reduces analog components and increases digital components in transmitter core architecture of wireless RF devices.
摘要翻译： 一种用于数字到模拟转换射频信号的数字线性发射机。 发射机在无线设备的发射路径中包括Δ西格玛（DeltaSigma）数模转换器（DAC）和加权信号数模转换器，以减少对相对大的模拟组件的依赖。 DeltaSigma DAC转换过采样信号的最低有效位，而加权信号数模转换器转换过采样信号的最高有效位。 发射机核心包括用于提供过采样的调制数字信号的组件，然后在产生相应的模拟信号之前对过采样信号进行一阶滤波。 该装置和方法减少了模拟组件并增加了无线RF设备的发射机核心架构中的数字组件。
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公开(公告)号：US20100027596A1
公开(公告)日：2010-02-04
申请号：US12520448
申请日：2007-12-21
IPC分类号： H04B1/38
CPC分类号： H03G3/3047 , H04B2001/0416
摘要： A closed loop power output calibration system for variable power output wireless devices. The wireless device includes a wireless transceiver having a transmit core coupled to a discrete power amplifier. Power detection circuitry formed in the wireless transceiver provides a detected power level of the power amplifier, and a reference power level, both of which are converted to digital signals using existing I and Q signal analog to digital converters in the receiver core. The digital signals are processed to cancel power distortion and temperature effects to provide a resulting power feedback signal. Corrective control signals are generated in response to the power feedback signal relative to a desired power output level. The gain in the transmit core is then adjusted in response to the corrective control signals such that the power amplifier outputs the target output power level.
摘要翻译： 一种用于可变功率输出无线设备的闭环功率输出校准系统。 无线设备包括具有耦合到分立功率放大器的发射芯的无线收发器。 在无线收发器中形成的功率检测电路提供功率放大器的检测功率电平和参考功率电平，两者都使用接收机核心中现有的I和Q信号模数转换器转换成数字信号。 处理数字信号以消除功率失真和温度影响，以提供最终的功率反馈信号。 响应于功率反馈信号相对于期望的功率输出电平产生校正控制信号。 然后响应于校正控制信号调整发送内核中的增益，使得功率放大器输出目标输出功率电平。
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