公开(公告)号：US20100250839A1

公开(公告)日：2010-09-30

申请号：US12813164

申请日：2010-06-10

申请人： Takafumi ITO ,  Hiroyuki Sakamoto

发明人： Takafumi ITO ,  Hiroyuki Sakamoto

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F17/00

CPC分类号： G06F3/0643 ,  G06F3/0613 ,  G06F3/0626 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7202

摘要： A method for controlling a memory card which includes a nonvolatile semiconductor memory whose memory area includes a plurality of write areas is disclosed. A first area which is a part of the plurality of write areas is set in accordance with management executed by a first file system. The first file system sequentially writes data along a direction in which addresses of the plurality of write areas increase. A second area which is a part of the plurality of write areas is set in accordance with management executed by a second file system. The second file system writes data in an order which does not depend on the addresses.

摘要翻译： 一种用于控制存储卡的方法，其包括其存储区域包括多个写入区域的非易失性半导体存储器。 根据由第一文件系统执行的管理来设置作为多个写入区域的一部分的第一区域。 第一文件系统沿着多个写入区域的地址增加的方向顺序地写入数据。 根据由第二文件系统执行的管理来设置作为多个写入区域的一部分的第二区域。 第二个文件系统以不依赖于地址的顺序写入数据。

公开(公告)号：US20120036313A1

公开(公告)日：2012-02-09

申请号：US13271848

申请日：2011-10-12

申请人： Takafumi ITO ,  Hiroyuki Sakamoto

发明人： Takafumi ITO ,  Hiroyuki Sakamoto

IPC分类号： G06F12/00

CPC分类号： G06F3/0643 ,  G06F3/0613 ,  G06F3/0626 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7202

摘要： A method for controlling a memory card which includes a nonvolatile semiconductor memory whose memory area includes a plurality of write areas is disclosed. A first area which is a part of the plurality of write areas is set in accordance with management executed by a first file system. The first file system sequentially writes data along a direction in which addresses of the plurality of write areas increase. A second area which is a part of the plurality of write areas is set in accordance with management executed by a second file system. The second file system writes data in an order which does not depend on the addresses.

摘要翻译： 一种用于控制存储卡的方法，其包括其存储区域包括多个写入区域的非易失性半导体存储器。 根据由第一文件系统执行的管理来设置作为多个写入区域的一部分的第一区域。 第一文件系统沿着多个写入区域的地址增加的方向顺序地写入数据。 根据由第二文件系统执行的管理来设置作为多个写入区域的一部分的第二区域。 第二个文件系统以不依赖于地址的顺序写入数据。

公开(公告)号：US20090207326A1

公开(公告)日：2009-08-20

申请号：US12370788

申请日：2009-02-13

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： H04N5/74

CPC分类号： H04N9/3105

摘要： A projector includes a plurality of light modulation elements adapted to modulate a plurality of colored light beams based on image data, a combining optical system adapted to combine the modulated colored light beams to emit image light, and a projection optical system adapted to project the image light emitted from the combining optical system on a projection screen. The light modulation elements are disposed with respect to the combining optical system so that long sides of the respective light modulation elements are adjacent to each other. Signal line cable boards adapted to provide the respective light modulation elements with signals, and coupled to short sides of the respective light modulation elements. A scanning direction of writing the image data to the light modulation elements is set to be parallel to a direction of the short side of an image display area in each of the light modulation elements.

摘要翻译： 一种投影仪，包括适于基于图像数据调制多个有色光束的多个光调制元件，适于组合调制的彩色光束以发射图像光的组合光学系统，以及适于投影图像的投影光学系统 在投影屏幕上从组合光学系统发射的光。 光调制元件相对于组合光学系统设置，使得各个调光元件的长边彼此相邻。 适于向相应的光调制元件提供信号并且耦合到相应的光调制元件的短边的信号线电缆板。 将图像数据写入光调制元件的扫描方向被设置为平行于每个光调制元件中的图像显示区域的短边方向。

公开(公告)号：US20080250220A1

公开(公告)日：2008-10-09

申请号：US12062060

申请日：2008-04-03

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： G06F12/00

CPC分类号： G06F12/0246

摘要： In a memory system according to an aspect of the invention, a nonvolatile semiconductor memory includes storage areas each composed of a group of storage elements, stores one or more than one bit of data into each of the storage elements and selects either a first write mode in which n bits or a second write mode in which n+1 bits are stored into each of the storage elements. A controller instructs the semiconductor memory to store data, for each of logical address groups each composed of logical addresses belonging to a specific range, by writing a part of the data allocated with the logical addresses included in the logical address group into a first number of the storage areas in the first write mode and writing another part of the data into a second number of the storage areas in the second write mode.

摘要翻译： 在根据本发明的一个方面的存储器系统中，非易失性半导体存储器包括每个由一组存储元件组成的存储区域，将一个或多于一个位的数据存储到每个存储元件中，并选择第一写入模式 其中将n + 1位存储到每个存储元件中的n位或第二写入模式。 控制器通过将分配有包含在逻辑地址组中的逻辑地址的数据的一部分写入到第一数量的数据中来指示半导体存储器存储每个由属于特定范围的逻辑地址组成的逻辑地址组的数据 所述存储区域处于所述第一写入模式，并且将所述数据的另一部分写入所述第二写入模式中的第二数量的存储区域。

公开(公告)号：US20080172427A1

公开(公告)日：2008-07-17

申请号：US11967544

申请日：2007-12-31

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： G06F17/30

CPC分类号： G06F17/30218 ,  G06F12/0246 ,  G06F2212/7203 ,  G06F2212/7207

摘要： A memory system includes a nonvolatile semiconductor memory and a controller which controls the semiconductor memory, the memory system being inserted into the host device. The host device further includes a file management system which allocates a cluster defined in a FAT file system to write data and manages the data allocated to the cluster by using management data including a file allocation table defined in the FAT file system and a directory entry. The directory entry includes a root directory entry serving as entry information of a root directory of an uppermost layer and a sub-directory entry serving as entry information of a sub-directory belonging to the root directory. The file system allocates the plurality of clusters in a predetermined range in which addresses are serial to the management data.

摘要翻译： 存储器系统包括非易失性半导体存储器和控制半导体存储器的控制器，该存储器系统被插入到主机设备中。 主机设备还包括文件管理系统，其分配在FAT文件系统中定义的群集来写入数据，并通过使用包括在FAT文件系统中定义的文件分配表和目录条目的管理数据来管理分配给群集的数据。 目录条目包括作为最上层的根目录的条目信息的根目录条目和用作属于根目录的子目录的条目信息的子目录条目。 文件系统将多个集群分配到管理数据中的串行地址的预定范围内。

公开(公告)号：US20080046649A1

公开(公告)日：2008-02-21

申请号：US11837872

申请日：2007-08-13

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： G06F12/16

CPC分类号： G11C16/349 ,  G11C16/04 ,  G11C16/0483 ,  G11C2029/0401 ,  G11C2029/0409 ,  G11C2029/4402

摘要： A method of controlling a semiconductor memory card system including a host device incorporating a semiconductor memory card and communicating information with a user of the host device to warn the imminent end of the life of the memory card in the system is provided. According to one aspect, there is provided a method of controlling a semiconductor memory card, the method comprising creating end-of-life index data of the semiconductor memory card, reading the end-of-life index data in response to a command from a host device to the semiconductor memory card, creating an end-of-life warning status of the semiconductor memory card from the end-of-life index data based on a life control limit value, and sending a response containing the end-of-life warning status to the host device as a response to the command through the same communication line as that for the command.

摘要翻译： 提供了一种控制半导体存储卡系统的方法，该系统包括并入有半导体存储卡的主机设备，并且与主机设备的用户通信信息，以警告系统中存储卡的使用寿命即将结束。 根据一个方面，提供了一种控制半导体存储卡的方法，所述方法包括：产生半导体存储卡的寿命终止指数数据，读取寿命终止索引数据，以响应于来自 主机设备到半导体存储卡，基于寿命控制极限值从寿命终止指数数据产生半导体存储卡的报废状态，并发送包含寿命终止的响应 作为对命令的响应，通过与命令相同的通信线路向主机设备发出警告状态。

公开(公告)号：US20110264826A1

公开(公告)日：2011-10-27

申请号：US13178681

申请日：2011-07-08

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： G06F3/00

CPC分类号： G06F13/385 ,  Y02D10/14 ,  Y02D10/151

摘要： A memory card capable of connecting to a host device includes a flash memory, a host interface unit which transfers data between a host device and the memory card, and a transfer mode control unit which changes a data transfer mode based on a command from the host device. The transfer mode control unit outputs status data containing an error code to the host device if a transfer mode change command is inputted from the host device, instructing the memory card to change to a transfer mode not supported by the host interface unit of the memory card.

摘要翻译： 能够连接到主机设备的存储卡包括闪存，在主机设备和存储卡之间传送数据的主机接口单元，以及基于来自主机的命令改变数据传输模式的传送模式控制单元 设备。 如果从主机设备输入传送模式改变命令，传送模式控制单元将包含错误代码的状态数据输出到主机设备，指示存储卡改变为不由存储卡的主机接口单元支持的传送模式 。

公开(公告)号：US20110113188A1

公开(公告)日：2011-05-12

申请号：US13005910

申请日：2011-01-13

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： G06F12/00 ,  G06F1/04

CPC分类号： G06F3/0611 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/1433 ,  G06F13/4234 ,  G06F2003/0692 ,  G06F2206/1014 ,  G11C7/22

摘要： A memory card is attached to a host device, and includes a data control circuit which transfers data with respect to the host device in synchronism with a rise edge and a fall edge of a clock signal.

摘要翻译： 存储卡连接到主机设备，并且包括与时钟信号的上升沿和下降沿同步地相对于主机设备传送数据的数据控制电路。

公开(公告)号：US20100218064A1

公开(公告)日：2010-08-26

申请号：US12710723

申请日：2010-02-23

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： G06F12/00 ,  G06F11/07

CPC分类号： G06F11/1068 ,  G06F12/0246 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C2211/5641

摘要： A semiconductor memory device includes a first nonvolatile memory, a second nonvolatile memory, a controller and an input/output bus. The first nonvolatile memory includes a plurality of memory cells having a first memory cell configuration. The second nonvolatile memory includes a plurality of memory cells having a second memory cell configuration different from the first memory cell configuration. The controller includes a first controller which controls the first nonvolatile memory, and a second controller which controls the second nonvolatile memory. An input/output bus is connected to the controller and is configured to exchange signals between an external apparatus and the controller. In accordance with a signal input via the input/output bus, the controller performs at least one of an operation of accessing the first nonvolatile memory by the first controller, and an operation of accessing the second nonvolatile memory by the second controller.

摘要翻译： 半导体存储器件包括第一非易失性存储器，第二非易失性存储器，控制器和输入/输出总线。 第一非易失性存储器包括具有第一存储单元配置的多个存储单元。 第二非易失性存储器包括具有与第一存储单元配置不同的第二存储单元配置的多个存储单元。 控制器包括控制第一非易失性存储器的第一控制器和控制第二非易失性存储器的第二控制器。 输入/输出总线连接到控制器，并被配置为在外部设备和控制器之间交换信号。 根据经由输入/输出总线的信号输入，控制器执行由第一控制器访问第一非易失性存储器的操作和由第二控制器访问第二非易失性存储器的操作中的至少一个。

公开(公告)号：US20100023721A1

公开(公告)日：2010-01-28

申请号：US12403815

申请日：2009-03-13

申请人： Takafumi ITO

发明人： Takafumi ITO

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F3/06 ,  G06F3/0679 ,  G06F3/0685 ,  G06F2212/1016 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7205

摘要： A memory system includes a nonvolatile memory, and a memory controller for performing control to extend the maximum value of a logical address by erasing data of the nonvolatile memory which has become unnecessary in accordance with a command from the outside, and reassigning the data which has become unnecessary to a memory area assigned to a part of the logical address.

摘要翻译： 存储器系统包括非易失性存储器和存储器控制器，用于执行控制以通过根据来自外部的命令擦除已经变得不必要的非易失性存储器的数据来扩展逻辑地址的最大值，并且重新分配具有 对于分配给逻辑地址的一部分的存储区域变得不必要。