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1.发明申请Semiconductor integrated circuit and design method for semiconductor integrated circuit 有权半导体集成电路半导体集成电路及其设计方法公开(公告)号：US20080141186A1
公开(公告)日：2008-06-12
申请号：US11979483
申请日：2007-11-05
IPC分类号： G06F17/50 , H03K19/173
CPC分类号： H01L28/20 , G06F2217/64 , H01L27/11807
摘要： The semiconductor integrated circuit of the invention includes: two first power supply lines placed in parallel in a same interconnect layer; a second power supply line placed between the two first power supply lines in the same interconnect layer; an actual operation flipflop connected to one of the two first power supply lines and the second power supply line and having a first clock terminal; and a dummy flipflop connected to the other first power supply line and the second power supply line and having a second clock terminal. The dummy flipflop includes: a contact connected to the other first power supply line or the second power supply line; and an interconnect for connecting the second clock terminal with the contact.
摘要翻译： 本发明的半导体集成电路包括：在相同的互连层中并联放置的两个第一电源线; 位于相同互连层中的两个第一电源线之间的第二电源线; 连接到两个第一电源线和第二电源线之一并具有第一时钟端口的实际操作触发器; 以及连接到另一个第一电源线和第二电源线并具有第二时钟端子的虚拟触发器。 虚拟触发器包括：连接到另一第一电源线或第二电源线的触点; 以及用于将第二时钟端子与触点连接的互连。
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2.发明授权Semiconductor integrated circuit and design method for semiconductor integrated circuit 有权半导体集成电路半导体集成电路及其设计方法公开(公告)号：US07992118B2
公开(公告)日：2011-08-02
申请号：US11979483
申请日：2007-11-05
IPC分类号： G06F17/50 , G06F7/38 , H03K19/177 , H01L25/00 , H03K19/173
CPC分类号： H01L28/20 , G06F2217/64 , H01L27/11807
摘要： The semiconductor integrated circuit of the invention includes: two first power supply lines placed in parallel in a same interconnect layer; a second power supply line placed between the two first power supply lines in the same interconnect layer; an actual operation flipflop connected to one of the two first power supply lines and the second power supply line and having a first clock terminal; and a dummy flipflop connected to the other first power supply line and the second power supply line and having a second clock terminal. The dummy flipflop includes: a contact connected to the other first power supply line or the second power supply line; and an interconnect for connecting the second clock terminal with the contact.
摘要翻译： 本发明的半导体集成电路包括：在相同的互连层中并联放置的两个第一电源线; 位于相同互连层中的两个第一电源线之间的第二电源线; 连接到两个第一电源线和第二电源线之一并具有第一时钟端口的实际操作触发器; 以及连接到另一个第一电源线和第二电源线并具有第二时钟端子的虚拟触发器。 虚拟触发器包括：连接到另一第一电源线或第二电源线的触点; 以及用于将第二时钟端子与触点连接的互连。
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公开(公告)号：US08151238B2
公开(公告)日：2012-04-03
申请号：US12943549
申请日：2010-11-10
IPC分类号： G06F17/50 , G06F9/455 , H01L25/00 , H01L27/118 , H01L23/52
CPC分类号： H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
摘要翻译： 在半导体集成电路的布局处理中，最初以不超过当前阈值的布置形成电源。 在形成电源之后发生超过电流阈值的情况下，电源配置根据当前阈值，设计规则数据库和电源配线密度而变化，以便不超过当前阈值 值。
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公开(公告)号：US20110057320A1
公开(公告)日：2011-03-10
申请号：US12943549
申请日：2010-11-10
IPC分类号： H01L23/522
CPC分类号： H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
摘要翻译： 在半导体集成电路的布局处理中，最初以不超过当前阈值的布置形成电源。 在形成电源之后发生超过电流阈值的情况下，电源配置根据当前阈值，设计规则数据库和电源配线密度而变化，以便不超过当前阈值 值。
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公开(公告)号：US20070124715A1
公开(公告)日：2007-05-31
申请号：US11594750
申请日：2006-11-09
IPC分类号： G06F17/50
CPC分类号： H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
摘要翻译： 在半导体集成电路的布局处理中，最初以不超过当前阈值的布置形成电源。 在形成电源之后发生超过电流阈值的情况下，电源配置根据当前阈值，设计规则数据库和电源配线密度而变化，以便不超过当前阈值 值。
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公开(公告)号：US07855579B2
公开(公告)日：2010-12-21
申请号：US11594750
申请日：2006-11-09
CPC分类号： H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
摘要翻译： 在半导体集成电路的布局处理中，最初以不超过当前阈值的布置形成电源。 在形成电源之后发生超过电流阈值的情况下，电源配置根据当前阈值，设计规则数据库和电源配线密度而变化，以便不超过当前阈值 值。
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