公开(公告)号：US20090146319A1

公开(公告)日：2009-06-11

申请号：US12327099

申请日：2008-12-03

申请人： Takamitsu ONDA ,  Kazuhiko MATSUKI

发明人： Takamitsu ONDA ,  Kazuhiko MATSUKI

IPC分类号： H01L23/495

CPC分类号： H01L24/05 ,  H01L22/32 ,  H01L23/60 ,  H01L27/0203 ,  H01L27/0248 ,  H01L2224/02166 ,  H01L2224/05553 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033

摘要： A semiconductor device which can prevent damage to an ESD protection device by pressure when bonding is carried out, while having a pad configuration that can ensure bonding reliability, with the semiconductor device being made as small as possible. A bonding area that is an area for wire bonding with respect to an external electrode pad and a probing area that is an area in which a probe needle is applied when probing, are provided, and the ESD protection device and a discharge path therefor are arranged below the probing area. Arranged below the bonding area are a support via that is a little smaller than the bonding pad, and a support pattern having a size corresponding to the bonding pad and joined to the bonding pad by the support via.

摘要翻译： 一种半导体器件，其能够在进行接合时能够防止由于压力而对ESD保护器件造成损坏的半导体器件，同时具有能够确保接合可靠性的焊盘构造，半导体器件尽可能小。 设置作为与外部电极焊盘进行引线接合的区域的接合区域和在探测时作为探针插入的区域的探测区域，并且设置ESD保护器件及其放电路径 低于探测区域。 在接合区域下方布置有比接合焊盘稍小的支撑通孔，以及具有与接合焊盘相对应的尺寸并且由支撑通孔接合到接合焊盘的支撑图案。

公开(公告)号：US20090237186A1

公开(公告)日：2009-09-24

申请号：US12407250

申请日：2009-03-19

申请人： Takamitsu ONDA ,  Kazuhiko MATSUKI

发明人： Takamitsu ONDA ,  Kazuhiko MATSUKI

IPC分类号： H01P3/08

CPC分类号： H01P3/003

摘要： A semiconductor device comprises a semiconductor substrate; a diffusion layer formed on the semiconductor substrate; at least two wiring layers formed opposite to each other over the semiconductor substrate; signal lines for transmitting a signal maintaining a predetermined voltage, each of the signal lines being formed in each of the two wiring layers; shield lines fixed to a constant voltage to shield the signal lines, each of the shield lines being formed adjacent to each of the signal lines in the two wiring layers; and a gate electrode formed over the semiconductor substrate via an insulation film. In the semiconductor device, at least one of the signal lines formed in a lower wiring layer of the at least two wiring layers is electrically connected to the gate electrode opposed in a stacking direction.

摘要翻译： 半导体器件包括半导体衬底; 形成在所述半导体衬底上的扩散层; 在所述半导体衬底上形成为相互相对的至少两个布线层; 用于发送保持预定电压的信号的信号线，每个信号线形成在两个布线层中的每一个中; 屏蔽线固定在恒定电压上以屏蔽信号线，每条屏蔽线与两个布线层中的每个信号线相邻形成; 以及通过绝缘膜形成在半导体衬底上的栅电极。 在半导体器件中，形成在至少两个布线层的下布线层中的信号线中的至少一个电连接到堆叠方向相对的栅电极。