公开(公告)号：US07917833B2

公开(公告)日：2011-03-29

申请号：US11682753

申请日：2007-03-06

申请人： Takashi Mizuochi ,  Naoki Suzuki ,  Seiji Kozaki

发明人： Takashi Mizuochi ,  Naoki Suzuki ,  Seiji Kozaki

IPC分类号： H03M13/00

CPC分类号： H04L1/0041 ,  H03M13/1515 ,  H03M13/17 ,  H03M13/2707 ,  H04L1/0071

摘要： A communication apparatus includes a transmitter and a receiver, wherein the transmitter further includes: an interleaver that rearranges positions of bits of an information frame; an FEC encoder that performs an error correction encoding to the information frame whose bit positions have been rearranged; and a selector that inserts FEC parity into predetermined positions of the information frame, to thereby generate a transmission signal, whereas the receiver includes: a selector that extracts an information frame part and an FEC parity part from a reception signal; an interleaver that rearranges positions of the bits of the information frame part using the same rule as that used at that transmitter side; an FEC decoder that corrects an error of bits rearranged based on the error correction parity part; and a de-interleaver that reproduces an information frame by returning positions of error-corrected bits to original bit positions.

摘要翻译： 通信装置包括发射机和接收机，其中所述发射机还包括：交织器，其重新排列信息帧的比特位置; FEC编码器，其对位位置重新排列的信息帧执行纠错编码; 以及选择器，其将FEC奇偶校验插入信息帧的预定位置，从而生成发送信号，而接收机包括：从接收信号中提取信息帧部分和FEC奇偶校验部分的选择器; 使用与在该发送机侧使用的规则相同的规则来重新排列信息帧部分的位的位置的交织器; FEC解码器，其基于纠错奇偶校验部分校正重新排列的比特的错误; 以及通过将错误校正的比特的位置返回到原始比特位置来再现信息帧的去交织器。

公开(公告)号：US20070162831A1

公开(公告)日：2007-07-12

申请号：US11682753

申请日：2007-03-06

申请人： Takashi Mizuochi ,  Naoki Suzuki ,  Seiji Kozaki

发明人： Takashi Mizuochi ,  Naoki Suzuki ,  Seiji Kozaki

IPC分类号： H03M13/00

CPC分类号： H04L1/0041 ,  H03M13/1515 ,  H03M13/17 ,  H03M13/2707 ,  H04L1/0071

摘要： A communication apparatus includes a transmitter and a receiver, wherein the transmitter further includes: an interleaver that rearranges positions of bits of an information frame; an FEC encoder that performs an error correction encoding to the information frame whose bit positions have been rearranged; and a selector that inserts FEC parity into predetermined positions of the information frame, to thereby generate a transmission signal, whereas the receiver includes: a selector that extracts an information frame part and an FEC parity part from a reception signal; an interleaver that rearranges positions of the bits of the information frame part using the same rule as that used at that transmitter side; an FEC decoder that corrects an error of bits rearranged based on the error correction parity part; and a de-interleaver that reproduces an information frame by returning positions of error-corrected bits to original bit positions.

公开(公告)号：US20070104225A1

公开(公告)日：2007-05-10

申请号：US11278274

申请日：2006-03-31

申请人： Takashi Mizuochi ,  Naoki Suzuki ,  Seiji Kozaki

发明人： Takashi Mizuochi ,  Naoki Suzuki ,  Seiji Kozaki

IPC分类号： H04J3/00

CPC分类号： H04L1/0041 ,  H03M13/1515 ,  H03M13/17 ,  H03M13/2707 ,  H04L1/0071

摘要： A communication apparatus includes a transmitter and a receiver, wherein the transmitter further includes: an interleaver that rearranges positions of bits of an information frame; an FEC encoder that performs an error correction encoding to the information frame whose bit positions have been rearranged; and a selector that inserts FEC parity into predetermined positions of the information frame, to thereby generate a transmission signal, whereas the receiver includes: a selector that extracts an information frame part and an FEC parity part from a reception signal; an interleaver that rearranges positions of the bits of the information frame part using the same rule as that used at that transmitter side; an FEC decoder that corrects an error of bits rearranged based on the error correction parity part; and a de-interleaver that reproduces an information frame by returning positions of error-corrected bits to original bit positions.

摘要翻译： 通信装置包括发射机和接收机，其中所述发射机还包括：交织器，其重新排列信息帧的比特位置; FEC编码器，其对位位置重新排列的信息帧执行纠错编码; 以及选择器，其将FEC奇偶校验插入信息帧的预定位置，从而生成发送信号，而接收机包括：从接收信号中提取信息帧部分和FEC奇偶校验部分的选择器; 使用与在该发送机侧使用的规则相同的规则来重新排列信息帧部分的位的位置的交织器; FEC解码器，其基于纠错奇偶校验部分校正重新排列的比特的错误; 以及通过将错误校正的比特的位置返回到原始比特位置来再现信息帧的去交织器。

公开(公告)号：US08977927B2

公开(公告)日：2015-03-10

申请号：US12778618

申请日：2010-05-12

申请人： Yoshikuni Miyata ,  Hideo Yoshida ,  Kazuo Kubo ,  Takashi Mizuochi

发明人： Yoshikuni Miyata ,  Hideo Yoshida ,  Kazuo Kubo ,  Takashi Mizuochi

IPC分类号： H03M13/00 ,  H03M13/29

CPC分类号： H03M13/29

摘要： An error-correction coding method that includes outer coding of performing a coding process for an outer code; and inner coding of performing a coding process for an inner code that has an error correction capability adjusted based on an error correction capability of the outer code.

摘要翻译： 一种纠错编码方法，包括对外部码进行编码处理的外部编码; 以及对具有基于外部码的​​纠错能力进行了调整的纠错能力的内部码的编码处理进行内部编码。

公开(公告)号：US08718487B2

公开(公告)日：2014-05-06

申请号：US13140955

申请日：2010-01-13

申请人： Takashi Sugihara ,  Soichiro Kametani ,  Takashi Mizuochi ,  Yoshiaki Konishi

发明人： Takashi Sugihara ,  Soichiro Kametani ,  Takashi Mizuochi ,  Yoshiaki Konishi

IPC分类号： H04B10/00

CPC分类号： H04L27/36 ,  H04B10/5053 ,  H04B10/5055 ,  H04B10/516

摘要： An optical transmitter for converting an input data series into an optical multi-level signal and for outputting the same, includes an LUT in which data for executing optical multi-level modulation is stored and from which first modulation data and second modulation data are output based on the input data series. A DAC converts the first modulation data by D/A conversion to generate a first multi-level signal. A DAC converts the second modulation data by D/A conversion to generate a second multi-level signal. A dual-electrode MZ modulator includes a first phase modulator for modulating light from a light source in accordance with the first multi-level signal and a second phase modulator for modulating light from the light source in accordance with the second multi-level signal, and combines an optical signal from the first phase modulator and an optical signal from the second phase modulator to output the optical multi-level signal.

摘要翻译： 用于将输入数据序列转换为光学多级信号并用于输出的光发送器包括：LUT，其中存储用于执行光学多电平调制的数据，并从其输出第一调制数据和第二调制数据 在输入数据系列上。 DAC通过D / A转换来转换第一调制数据以产生第一多电平信号。 DAC通过D / A转换来转换第二调制数据以产生第二多电平信号。 双电极MZ调制器包括用于根据第一多电平信号调制来自光源的光的第一相位调制器和用于根据第二多电平信号调制来自光源的光的第二相位调制器，以及 组合来自第一相位调制器的光信号和来自第二相位调制器的光信号以输出光多电平信号。

公开(公告)号：US08645806B2

公开(公告)日：2014-02-04

申请号：US12775825

申请日：2010-05-07

申请人： Takashi Sugihara ,  Takashi Mizuochi ,  Kazuo Kubo

发明人： Takashi Sugihara ,  Takashi Mizuochi ,  Kazuo Kubo

IPC分类号： H03M13/45

CPC分类号： H04L25/067

摘要： An optical receiving apparatus includes: an A/D converting circuit; a received-signal demodulating circuit that demodulates a received digital signal from the A/D converting circuit into an m-bit received signal; a soft-decision-data generating circuit that generates n-bit (n≦m) soft-decision data based on the m-bit received signal; and an error correcting circuit that performs error correction based on the n-bit soft-decision data and outputs an error-corrected received signal. The soft-decision-data generating circuit generates soft-decision data of n bits (n=p+1) that corresponds to a determination result according to 2n−1 soft-decision thresholds, by using an MSB of the m-bit received signal as hard-decision data, and by using, as reliability information, a result of comparison between a plurality of bits (k bits, where k≦m) on an MSB side of the m-bit received signal and a fixed threshold, or p bits (p≦m−k) selected from (m−k) bits on an LSB side of the m-bit received signal.

摘要翻译： 一种光接收装置，包括：A / D转换电路; 接收信号解调电路，将接收到的数字信号从A / D转换电路解调为m位接收信号; 软判决数据产生电路，其基于所述m位接收信号产生n位（n @ m）个软判决数据; 以及错误校正电路，其基于n位软判决数据进行纠错，并输出纠错接收信号。 软判决数据生成电路通过使用m比特接收信号的MSB，生成与根据2n-1个软判定阈值的判定结果对应的n位（n = p + 1）的软判决数据 作为硬判决数据，并且通过使用作为可靠性信息的m位接收信号的MSB侧的多个位（k位，其中k @ m）与固定阈值之间的比较结果，或者p 从m位接收信号的LSB侧的（mk）位中选择的位（p @ mk）。

公开(公告)号：US20130311840A1

公开(公告)日：2013-11-21

申请号：US13982403

申请日：2012-02-20

申请人： Yoshikuni Miyata ,  Kenya Sugihara ,  Kiyoshi Onohara ,  Kazuo Kubo ,  Hideo Yoshida ,  Takashi Mizuochi

发明人： Yoshikuni Miyata ,  Kenya Sugihara ,  Kiyoshi Onohara ,  Kazuo Kubo ,  Hideo Yoshida ,  Takashi Mizuochi

IPC分类号： G06F11/07

CPC分类号： G06F11/076 ,  H04L1/203

摘要： An input bit error ratio estimating method executed by a communication control unit includes a computing, a condition determining, a first input BER estimating, a second input BER estimating, a third input BER estimating, and an input BER estimation result outputting. In the condition determining, the communication control unit determines which of a plurality of conditions set in advance to be narrowed down to one has been established, based on a post-internal decoding residual error detection ratio. Based on the condition that is determined in the condition determining as one that has been established, the communication control unit selects one out of a plurality of processing procedures for estimating the input BER, namely, selects one of the first input BER estimating to the third input BER estimating and executes the selected processing.

摘要翻译： 由通信控制单元执行的输入误码率估计方法包括计算，条件确定，第一输入BER估计，第二输入BER估计，第三输入BER估计和输入BER估计结果输出。 在所述条件判定中，所述通信控制部基于所述内部解码剩余错误检测率，确定预先设定为被缩小为一个的条件中的哪一个已被建立。 基于在确定为已经建立的条件中确定的条件，通信控制单元从用于估计输入BER的多个处理过程中选择一个，即，选择第三输入BER中的一个， 输入BER估计并执行所选择的处理。

公开(公告)号：US08495475B2

公开(公告)日：2013-07-23

申请号：US12767120

申请日：2010-04-26

申请人： Kazuo Kubo ,  Takashi Mizuochi ,  Takashi Sugihara

发明人： Kazuo Kubo ,  Takashi Mizuochi ,  Takashi Sugihara

IPC分类号： G06F11/00

CPC分类号： H03M13/2792 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/23 ,  H03M13/2906 ,  H03M13/2933 ,  H03M13/2936 ,  H03M13/2966 ,  H04J3/1652 ,  H04J2203/0089 ,  H04L1/0041 ,  H04L1/0065 ,  H04L2001/0096

摘要： An FEC frame structuring device includes a multi-lane distributing unit that distributes a data frame to be transmitted to n lanes, FEC coding units each performs FEC coding of the distributed data frame independently for each of the n lanes to generate an FEC frame, a multiplexing unit that multiplexes the FEC frame from the FEC coding units by relating to m channels of an optical signal, a demultiplexing unit that demultiplexes the m channels of the received optical signal by relating to the n lanes, FEC decoding units each performs FEC decoding of the demultiplexed FEC frame independently for each of the n lanes, and a multi-lane synchronizing unit that synchronizes the n lanes with each other after the FEC decoding performed by the FEC decoding units to reconstruct the original data frame.

摘要翻译： FEC帧结构设备包括分配要发送的数据帧到n个通道的多通道分配单元，FEC编码单元各自独立地对n个通道中的每一个执行分布式数据帧的FEC编码以生成FEC帧， 多路复用单元，其通过与光信号的m个信道相关的FEC编码单元来复用FEC帧;解复用单元，通过与n个通道相关来对接收到的光信号的m个信道进行解复用，FEC解码单元各自执行FEC解码 对于n个通道中的每一个独立地解复用的FEC帧，以及多个通道同步单元，其在由FEC解码单元执行的FEC解码之后使n个通道彼此同步以重建原始数据帧。

公开(公告)号：US08463138B2

公开(公告)日：2013-06-11

申请号：US12826129

申请日：2010-06-29

申请人： Takashi Sugihara ,  Soichiro Kametani ,  Takashi Mizuochi

发明人： Takashi Sugihara ,  Soichiro Kametani ,  Takashi Mizuochi

IPC分类号： H04B10/04 ,  H04B10/12

CPC分类号： H04B10/50575 ,  G02F1/0123 ,  G02F1/2255 ,  H04B10/564

摘要： Provided is a multi-value optical transmitter in which a DC bias may be controlled to be stabilized so as to obtain stable optical transmission signal quality in multi-value modulation using a dual-electrode MZ modulator. The multi-value optical transmitter includes: D/A converters for performing D/A conversion on first and second modulation data which are set based on an input data series, so as to generate a first and a second multi-value signal, respectively; a dual-electrode MZ modulator including phase modulators for modulating light from a light source based on the first multi-value signal and the second multi-value signal, so as to combine optical signals from the phase modulators to output the optical multi-value signal; an optical output power monitor for detecting average power of the optical multi-value signal; and a DC bias control unit for controlling a DC bias for the dual-electrode MZ modulator, so as to maximize the average power.

摘要翻译： 提供了一种多值光发射机，其中可以将DC偏压控制为稳定，以便使用双电极MZ调制器在多值调制中获得稳定的光传输信号质量。 多值光发射机包括：D / A转换器，用于对基于输入数据序列设置的第一和第二调制数据执行D / A转换，以分别产生第一和第二多值信号; 一种双电极MZ调制器，包括基于第一多值信号和第二多值信号调制来自光源的光的相位调制器，以便组合来自相位调制器的光信号以输出光学多值信号 ; 用于检测光学多值信号的平均功率的光输出功率监视器; 以及用于控制双电极MZ调制器的DC偏压的DC偏置控制单元，以使平均功率最大化。

公开(公告)号：US20110299852A1

公开(公告)日：2011-12-08

申请号：US13202001

申请日：2009-04-13

申请人： Takashi Mizuochi

发明人： Takashi Mizuochi

IPC分类号： H04B10/00 ,  H04J14/00 ,  H04J14/06

CPC分类号： H04L27/2096 ,  H04B10/5561 ,  H04B10/677

摘要： An optical transmission and reception system in which a plurality of tributary signals are converted into multilevel modulated light for transmission and reception. An apparatus for transmitting multilevel modulated light includes: FECs which perform error correction processing including addition of a tributary identifier; and a GEAR BOX which performs rate conversion on the processed signals. An apparatus for receiving multilevel modulated light includes: a 20G DQPSK REC which separates received multilevel modulated light into received tributary signals and outputs the signals to respective output systems; the GEAR BOX which performs rate conversion on the received tributary signals; the FECs which extract tributary identifiers from the received tributary signals; a TIM which compares tributary identifiers defined for the respective output systems in advance with the tributary identifies extracted; and a tributary selector which gives an instruction to change correspondence between the received tributary signals and the output systems if the result of comparison is a mismatch.

摘要翻译： 一种光发送和接收系统，其中多个支路信号被转换成用于发送和接收的多电平调制光。 用于发送多级调制光的装置包括：执行纠错处理的FEC，包括添加支路标识符; 以及对所处理的信号执行速率转换的GEAR BOX。 一种用于接收多电平调制光的装置，包括：20G DQPSK REC，其将接收的多电平调制光分离成接收的支路信号，并将该信号输出到相应的输出系统; 对接收到的支路信号执行速率转换的GEAR BOX; 从所接收的支路信号中提取支路标识符的FEC; 将对于各个输出系统预先定义的辅助标识符与提取的支流标识进行比较的TIM; 以及如果比较结果是不匹配，则给出改变所接收的支路信号与输出系统之间的对应关系的指令。