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    Video signal processing apparatus with means for magnifying and processing a picture image correspondingly to video signals
    2.
    发明授权
    Video signal processing apparatus with means for magnifying and processing a picture image correspondingly to video signals 失效
    视频信号处理装置，具有对应于视频信号放大和处理图像图像的装置

    公开(公告)号：US5953075A

    公开(公告)日：1999-09-14

    申请号：US900512

    申请日：1997-07-25

    申请人： Tatsuo Nagata ,  Takaaki Matono ,  Takeshi Sakai ,  Ryo Hasegawa ,  Koichi Sudo

    发明人： Tatsuo Nagata ,  Takaaki Matono ,  Takeshi Sakai ,  Ryo Hasegawa ,  Koichi Sudo

    IPC分类号： G06F3/147 ,  G09G3/20 ,  G09G5/00 ,  H04N5/44 ,  H04N7/01 ,  H04N9/74 ,  H04N3/223

    CPC分类号： G09G5/008 ,  G06F3/1475 ,  G09G5/005 ,  G09G2340/0414 ,  G09G2340/0421 ,  G09G2340/0442 ,  G09G2360/02 ,  G09G5/006

    摘要： The present invention relates to a video signal processing apparatus for converting video signals based on a desired transmission system such as NTSC, PAL, MUSE or any other system so as to conform to a display unit of a desired screen system such as XGA, VGA or the like. The apparatus has a feature that it is provided with a PLL circuit for changing a sampling frequency used by an analog-to-digital converter for converting inputted video signals into digital signals in accordance with the sort of the transmission system of the video signals, and a controller for controlling picture element interpolation of the digital signals performed by a picture image magnifying circuit for magnifying the video signals horizontally and vertically, in accordance with the sort of the transmission system of the video signals.

    摘要翻译： 本发明涉及一种视频信号处理装置，用于根据诸如NTSC，PAL，MUSE或任何其他系统的期望的传输系统来转换视频信号，以便符合所需屏幕系统的显示单元，例如XGA，VGA或 类似。 该装置具有一个特征，它具有一个PLL电路，用于根据视频信号的传输系统的种类，改变用于将输入的视频信号转换为数字信号的模拟 - 数字转换器使用的采样频率;以及 控制器，用于控制由图像放大电路执行的数字信号的像素内插，用于根据视频信号的传输系统的分类水平和垂直放大视频信号。

    Gamma correction circuit
    3.
    发明授权
    Gamma correction circuit 失效
    伽马校正电路

    公开(公告)号：US06344857B1

    公开(公告)日：2002-02-05

    申请号：US09283294

    申请日：1999-04-01

    申请人： Takaaki Matono ,  Haruki Takata ,  Katsunobu Kimura ,  Tatsuo Nagata ,  Takeshi Sakai ,  Koichi Sudo

    发明人： Takaaki Matono ,  Haruki Takata ,  Katsunobu Kimura ,  Tatsuo Nagata ,  Takeshi Sakai ,  Koichi Sudo

    IPC分类号： G09G504

    CPC分类号： G09G3/2011 ,  G09G3/20 ,  G09G2320/0276 ,  H04N5/202

    摘要： A gamma correction circuit includes a node level setting unit set predetermined level values of video signals from outside, in a case where encoded M-bit (where M is an arbitrary integer) video signals being represented by using predetermined number of sections and the level values of the video signals corresponding to 2n+1 number of nodes (where n is an arbitrary integer) associated with the sections on which the node are specified, and a gamma correction unit for executing gamma correction for the M-bit video signal in accordance with the level values of the nodes set in the node level setting unit, thereby the gamma correction circuit executes gamma correction on various types of display devices.

    摘要翻译： 在通过使用预定数量的部分表示编码的M位（其中M是任意整数）视频信号的情况下，伽马校正电路包括设置来自外部的视频信号的预定电平值的节点电平设置单元， 对应于与指定节点的部分相关联的2n + 1个节点数目（其中n是任意整数）的视频信号，以及用于根据M-位视频信号执行伽马校正的伽马校正单元 在节点级设置单元中设置的节点的电平值，从而伽马校正电路对各种类型的显示设备执行伽马校正。

    Image display apparatus
    4.
    发明授权
    Image display apparatus 失效
    图像显示装置

    公开(公告)号：US6078702A

    公开(公告)日：2000-06-20

    申请号：US978515

    申请日：1997-11-25

    申请人： Takaaki Matono ,  Tatsuo Nagata ,  Takeshi Sakai ,  Koichi Sudo

    发明人： Takaaki Matono ,  Tatsuo Nagata ,  Takeshi Sakai ,  Koichi Sudo

    IPC分类号： H04N5/66 ,  G09G5/36 ,  H04N5/46 ,  H04N9/64 ,  G06K9/32

    CPC分类号： G09G5/005 ,  H04N5/46 ,  G09G2320/0613 ,  G09G2340/0407 ,  H04N5/4401 ,  H04N7/0122 ,  H04N9/641

    摘要： The present invention is concerned with image display apparatus capable of displaying the image of each of a television signal (TV signal) and an image signal (PC signal) from a personal computer. In addition, the present invention is to improve the performance of such apparatus, particularly to prevent the image from being deteriorated when the pixel number is converted, or changed to increase the pixel number of each of the TV signal and PC signal. In order to achieve this, the apparatus according to the invention has its pixel number conversion circuit provided with a plurality of conversion modes of different systems so that the pixel number conversion can be performed by properly switching the conversion modes in accordance with the type of the input image signal.

    摘要翻译： 本发明涉及能够从个人计算机显示电视信号（TV信号）和图像信号（PC信号）中的每一个的图像的图像显示装置。 此外，本发明是为了提高这种装置的性能，特别是为了防止像素数转换时的图像劣化，或改变为增加TV信号和PC信号中的每一个的像素数。 为了实现这一点，根据本发明的装置具有其像素数转换电路，其具有不同系统的多个转换模式，使得可以通过根据类型的转换模式适当地切换转换模式来执行像素数转换 输入图像信号。

    Noise reduction signal processing circuit and display apparatus
    5.
    发明授权
    Noise reduction signal processing circuit and display apparatus 失效
    降噪信号处理电路和显示装置

    公开(公告)号：US06195132B1

    公开(公告)日：2001-02-27

    申请号：US09345489

    申请日：1999-07-01

    申请人： Katsunobu Kimura ,  Takaaki Matono ,  Haruki Takata ,  Tatsuo Nagata ,  Masato Sugiyama ,  Yasutaka Tsuru ,  Koichi Sudo

    发明人： Katsunobu Kimura ,  Takaaki Matono ,  Haruki Takata ,  Tatsuo Nagata ,  Masato Sugiyama ,  Yasutaka Tsuru ,  Koichi Sudo

    IPC分类号： H04N521

    CPC分类号： H04N5/21

    摘要： A noise reduction signal processing apparatus for reducing noises accurately, such as for use in a display apparatus for displaying a video signal, has a median filter (40) which receives the video signal, and which executes a filter processing on the inputted video signal and outputs a reference signal; a subtracter (50) which is connected with the median filter (40), and which outputs a difference signal that indicates a difference between a reference signal outputted from the median filter (40) and the video signal; a minimum value detection circuit (70) which outputs the difference signal from the subtracter (50) or a limitation value, whichever is smaller, as a minimum value signal; and an adder (35) which adds a noise reduction signal obtained on the basis of the minimum value signal output from the minimum value detection circuit (70) and the video signal.

    摘要翻译： 用于在用于显示视频信号的显示装置中使用的用于降低噪声的噪声降低信号处理装置具有接收视频信号的中值滤波器（40），并对输入的视频信号执行滤波处理， 输出参考信号; 与所述中值滤波器连接的减法器，其输出表示从所述中值滤波器输出的参考信号与所述视频信号之间的差的差分信号; 输出来自减法器（50）的差分信号或限制值（较小者）的最小值检测电路（70）作为最小值信号; 以及加法器（35），其添加基于从最小值检测电路（70）输出的最小值信号获得的噪声降低信号和视频信号。

    Automatic clock phase adjusting device and picture display employing the same
    6.
    发明授权
    Automatic clock phase adjusting device and picture display employing the same 失效
    自动时钟相位调整装置和采用相同的图像显示

    公开(公告)号：US06340993B1

    公开(公告)日：2002-01-22

    申请号：US09399223

    申请日：1999-09-20

    申请人： Ryo Hasegawa ,  Takaaki Matono ,  Takeshi Sakai ,  Ryuichi Someya

    发明人： Ryo Hasegawa ,  Takaaki Matono ,  Takeshi Sakai ,  Ryuichi Someya

    IPC分类号： H03M112

    CPC分类号： G09G5/008 ,  H04N5/126

    摘要： An automatic clock phase adjusting device is employed principally in a picture display to adjust automatically the phase of a clock signal given to an A/D converter which converts an analog image signal into a corresponding digital image signal. The automatic clock phase adjusting device comprises a delay circuit that delays the phase of the clock signal; an image level detecting circuit that detects the image level of a horizontal image starting portion of the digital image signal and the image level of an image terminating portion of the digital image signal; and a control circuit that controls a delay by which the delay circuit delays the clock signal on the basis of the output signal of the image level detecting circuit. The control circuit controls the phase delay by which the delay circuit delays the clock signal, combines the image level of the horizontal image starting portion of the digital image signal, and the image level of the horizontal image terminating portion of the digital image signal to obtain a combined image level on the basis of the output signal of the image level detecting circuit, and selects an optimum phase of the clock signal in which the combined image level is maximum to determine the phase delay.

    摘要翻译： 自动时钟相位调整装置主要用于图像显示器中，以自动调整给予A / D转换器的时钟信号的相位，该A / D转换器将模拟图像信号转换成相应的数字图像信号。 自动时钟相位调整装置包括延迟时钟信号的相位的延迟电路; 检测数字图像信号的水平图像开始部分的图像水平和数字图像信号的图像终止部分的图像水平的图像水平检测电路; 以及控制电路，其控制延迟电路基于图像电平检测电路的输出信号延迟时钟信号的延迟。 控制电路控制延迟电路延迟时钟信号的相位延迟，组合数字图像信号的水平图像开始部分的图像电平和数字图像信号的水平图像终止部分的图像电平，以获得 基于图像电平检测电路的输出信号的组合图像电平，并且选择组合图像电平最大的时钟信号的最佳相位以确定相位延迟。

    Contrast adjusting circuitry and video display apparatus using same
    8.
    发明申请
    Contrast adjusting circuitry and video display apparatus using same 有权
    对比度调节电路和使用其的视频显示装置

    公开(公告)号：US20050184981A1

    公开(公告)日：2005-08-25

    申请号：US11102771

    申请日：2005-04-11

    申请人： Hiroshi Aoki ,  Ryo Hasegawa ,  Takaaki Matono

    发明人： Hiroshi Aoki ,  Ryo Hasegawa ,  Takaaki Matono

    IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  H04N5/20 ,  H04N5/57 ,  H04N5/70 ,  H04N9/64 ,  H04N9/68 ,  H03M1/12 ,  H04N11/20

    CPC分类号： G09G3/2096 ,  G09G3/20 ,  G09G2320/0238 ,  G09G2320/066 ,  G09G2320/0666 ,  G09G2360/16 ,  H04N5/20 ,  H04N5/57 ,  H04N5/70 ,  H04N21/4318 ,  H04N21/44008

    摘要： With the aim of offering a video display technique by which stable and high contrast video images are reproduced, contrast adjusting circuitry is constructed. The contrast adjusting circuitry detects a maximum picture level (MPL) and an average picture level (APL) of analog-to-digital converted luminance signals for a predetermined period, determines one of the predefined luminance regions within which the MPL falls and one of the predefined luminance regions within which the APL falls, and, based on the thus determined luminance regions of both MPL and APL, carries out a contrast adjustment of video images by changing the gain of luminance signals and color depth correction by changing the gain of color signals.

    摘要翻译： 为了提供再现稳定和高对比度视频图像的视频显示技术，构建了对比度调整电路。 对比度调整电路在预定时间内检测模数转换亮度信号的最大图像电平（MPL）和平均图像电平（APL），确定MPL下降的预定亮度区域中的一个， APL下降的预定亮度区域，并且基于这样确定的MPL和APL的亮度区域，通过改变亮度信号的增益和通过改变颜色信号的增益来改变色彩深度校正来执行视频图像的对比度调整 。

    Contrast adjusting circuitry and video display apparatus using same
    10.
    发明授权
    Contrast adjusting circuitry and video display apparatus using same 有权
    对比度调节电路和使用其的视频显示装置

    公开(公告)号：US07227543B2

    公开(公告)日：2007-06-05

    申请号：US11258994

    申请日：2005-10-27

    申请人： Hiroshi Aoki ,  Ryo Hasegawa ,  Takaaki Matono

    发明人： Hiroshi Aoki ,  Ryo Hasegawa ,  Takaaki Matono

    IPC分类号： G09G5/00

    CPC分类号： G09G3/2096 ,  G09G3/20 ,  G09G2320/0238 ,  G09G2320/066 ,  G09G2320/0666 ,  G09G2360/16 ,  H04N5/20 ,  H04N5/57 ,  H04N5/70 ,  H04N21/4318 ,  H04N21/44008

    摘要： With the aim of offering a video display technique by which stable and high contrast video images are reproduced, contrast adjusting circuitry is constructed. The contrast adjusting circuitry detects a maximum picture level (MPL) and an average picture level (APL) of analog-to-digital converted luminance signals for a predetermined period, determines one of the predefined luminance regions within which the MPL falls and one of the predefined luminance regions within which the APL falls, and, based on the thus determined luminance regions of both MPL and APL, carries out a contrast adjustment of video images by changing the gain of luminance signals and color depth correction by changing the gain of color signals.

    摘要翻译： 为了提供再现稳定和高对比度视频图像的视频显示技术，构建了对比度调整电路。 对比度调整电路在预定时间内检测模数转换亮度信号的最大图像电平（MPL）和平均图像电平（APL），确定MPL下降的预定亮度区域中的一个， APL下降的预定亮度区域，并且基于这样确定的MPL和APL的亮度区域，通过改变亮度信号的增益和通过改变颜色信号的增益来改变色彩深度校正来执行视频图像的对比度调整 。