Apparatus And Method For Acceleration of Security Applications Through Pre-Filtering
    2.
    发明申请
    Apparatus And Method For Acceleration of Security Applications Through Pre-Filtering 审中-公开
    通过预过滤加速安全应用的装置和方法

    公开(公告)号:US20070039051A1

    公开(公告)日:2007-02-15

    申请号:US11465634

    申请日:2006-08-18

    CPC分类号: G06F21/56

    摘要: A first security processing stage performs a first multitude of tasks and a second security processing stage performs a second multitude of tasks. The first and second multitude of tasks may include common tasks. The first security processing stage is a prefilter to the second security processing stage. The input data received as a data stream is first processed by the first security processing stage, which in response, generates one or more first processed data streams. The first processed data streams may be further processed by the second security processing stage or may bypass the second security processing stage. The first security processing stage operates at a speed greater than the speed of the second security processing stage.

    摘要翻译: 第一安全处理阶段执行第一多个任务,第二安全处理阶段执行第二大量任务。 第一和第二个任务可能包括常见任务。 第一安全处理阶段是到第二安全处理阶段的预过滤器。 作为数据流接收的输入数据首先由第一安全处理阶段进行处理,第一安全处理阶段响应地生成一个或多个第一处理数据流。 第一处理数据流可以由第二安全处理级进一步处理,或可以绕过第二安全处理级。 第一安全处理级以大于第二安全处理级的速度的速度操作。

    Apparatus and method for accelerating intrusion detection and prevention systems using pre-filtering
    3.
    发明申请
    Apparatus and method for accelerating intrusion detection and prevention systems using pre-filtering 审中-公开
    使用预过滤加速入侵检测和预防系统的装置和方法

    公开(公告)号:US20060191008A1

    公开(公告)日:2006-08-24

    申请号:US11291530

    申请日:2005-11-30

    IPC分类号: G06F12/14

    摘要: An accelerated network intrusion detection and prevention system includes, in part, first, second and third processing stages. The first processing stage receives incoming packets and generates, in response, first and second processed data streams using a first set of rules. The first processing stage optionally detects whether the received packets are suspected of attacking the network and places the received data packets in the first processed data stream. The second processing stage receives the first processed data stream and generates, in response, a third processed data stream using a second set of rules. The second processing stage optionally classifies the first processed data stream, that is suspected of launching a network attack, as either attacks or benign network traffic. A third processing stage receives and processes the second and third processed data streams.

    摘要翻译: 加速网络入侵检测和预防系统部分包括第一,第二和第三处理阶段。 第一处理阶段接收传入的分组,并且响应地使用第一组规则生成第一和第二处理数据流。 第一处理阶段可选地检测所接收的分组是否被怀疑攻击网络,并将接收到的数据分组放置在第一处理数据流中。 第二处理阶段接收第一处理数据流,并且响应地使用第二组规则生成第三处理数据流。 第二处理阶段可选地将被怀疑发起网络攻击的第一处理数据流分类为攻击或良性网络流量。 第三处理阶段接收并处理第二和第三处理数据流。

    Apparatus and method for processing of security capabilities through in-field upgrades
    4.
    发明申请
    Apparatus and method for processing of security capabilities through in-field upgrades 审中-公开
    通过现场升级处理安全能力的装置和方法

    公开(公告)号:US20070162972A1

    公开(公告)日:2007-07-12

    申请号:US11330973

    申请日:2006-01-11

    IPC分类号: G06F12/14

    CPC分类号: G06F21/76 G06F2221/2111

    摘要: A method for upgrading one or more security applications, e.g., anti-spam, anti-virus, intrusion detection/prevention. The method includes deriving a second hardware logic from a security knowledge base. The method includes operating a computing system including a security device. The computer system is coupled to the one or more computer networks, e.g., local area networks, wide area networks, Internet. The security device has one or more security logic processors, which include one or more respective first hardware logic. The method transfers an FPGA image representative of at least the second hardware logic through the computer network to one or more first memory devices. The method includes temporarily halting one or more of the security logic processors at a predetermined portion of the stream of information according to a specific embodiment. The method includes loading the second hardware logic onto the one or more security logic processors while the one or more security logic processors have been paused. The method resumes the operation of the one or more security logic processors.

    摘要翻译: 一种用于升级一个或多个安全应用的方法,例如反垃圾邮件,防病毒,入侵检测/预防。 该方法包括从安全知识库导出第二硬件逻辑。 该方法包括操作包括安全设备的计算系统。 计算机系统耦合到一个或多个计算机网络,例如局域网,广域网,因特网。 安全设备具有一个或多个安全逻辑处理器,其包括一个或多个相应的第一硬件逻辑。 该方法将表示至少第二硬件逻辑的FPGA图像通过计算机网络传送到一个或多个第一存储器件。 该方法包括根据具体实施例暂时停止信息流的预定部分处的一个或多个安全逻辑处理器。 该方法包括在一个或多个安全逻辑处理器已经暂停时将第二硬件逻辑加载到一个或多个安全逻辑处理器上。 该方法恢复一个或多个安全逻辑处理器的操作。

    Fast pattern matching using large compressed databases
    5.
    发明申请
    Fast pattern matching using large compressed databases 审中-公开
    使用大型压缩数据库的快速模式匹配

    公开(公告)号:US20060193159A1

    公开(公告)日:2006-08-31

    申请号:US11326131

    申请日:2006-01-04

    IPC分类号: G11C15/00

    CPC分类号: G06F16/9014

    摘要: A pattern matching system includes, in part, a multitude of databases each configured to store and supply compressed data for matching to the received data. The system divides each data stream into a multitude of segments and optionally computes a data pattern from the data stream prior to the division into a multitude of segments. Segments of the data pattern are used to define an address for one or more memory tables. The memory tables are read such that the outputs of one or more memory tables are used to define the address of another memory table. If during any matching cycle, the data retrieved from any of the successively accessed memory tables include an identifier related to any or all previously accessed memory tables, a matched state is detected. A matched state contains information related to the memory location at which the match occurs as well as information related to the matched pattern, such as the match location in the input data stream.

    摘要翻译: 模式匹配系统部分地包括多个数据库,每个数据库被配置为存储和提供压缩数据以匹配所接收的数据。 该系统将每个数据流划分成多个段,并且可选地在分割成多个段之前从数据流计算数据模式。 数据模式的段用于定义一个或多个存储表的地址。 读取存储器表,使得一个或多个存储器表的输出用于定义另一个存储器表的地址。 如果在任何匹配周期期间,从任何连续访问的存储器表中检索的数据包括与任何或所有先前访问的存储器表相关的标识符,则检测到匹配状态。 匹配状态包含与匹配发生的存储器位置有关的信息以及与匹配模式相关的信息,例如输入数据流中的匹配位置。

    Apparatus and method for acceleration of security applications through pre-filtering
    6.
    发明申请
    Apparatus and method for acceleration of security applications through pre-filtering 审中-公开
    通过预过滤加速安全应用的装置和方法

    公开(公告)号:US20060174343A1

    公开(公告)日:2006-08-03

    申请号:US11291524

    申请日:2005-11-30

    IPC分类号: G06F12/14

    摘要: A first security processing stage performs a first multitude of tasks and a second security processing stage performs a second multitude of tasks. The first and second multitude of tasks may include common tasks. The first security processing stage is a prefilter to the second security processing stage. The input data received as a data stream is first processed by the first security processing stage, which in response, generates one or more first processed data streams. The first processed data streams may be further processed by the second security processing stage or may bypass the second security processing stage. The first security processing stage operates at a speed greater than the speed of the second security processing stage.

    摘要翻译: 第一安全处理阶段执行第一多个任务,第二安全处理阶段执行第二大量任务。 第一和第二个任务可能包括常见任务。 第一安全处理阶段是到第二安全处理阶段的预过滤器。 作为数据流接收的输入数据首先由第一安全处理阶段进行处理,第一安全处理阶段响应地生成一个或多个第一处理数据流。 第一处理数据流可以由第二安全处理级进一步处理,或可以绕过第二安全处理级。 第一安全处理级以大于第二安全处理级的速度的速度操作。

    Method for transformation of regular expressions
    7.
    发明申请
    Method for transformation of regular expressions 审中-公开
    正则表达式转换的方法

    公开(公告)号:US20060085389A1

    公开(公告)日:2006-04-20

    申请号:US11213622

    申请日:2005-08-26

    IPC分类号: G06F17/30 G06F7/00

    摘要: A method and apparatus for transforming regular expressions into a less resource intensive representation is disclosed. The method and apparatus converts a collection of regular expressions into a multi-level representation in which the memory requirements of the lowest level representation is reduced when compared with a conventional finite state automaton representation. The method and apparatus converts a collection of regular expressions into a collection of segments and a higher level representation in a way that retains the semantics of the original set of regular expressions. This transformation is performed through the use of an intermediate form. The resulting representation and collection admit an implementation which avoids the potentially costly memory requirements of a traditional implementation of the original expressions.

    摘要翻译: 公开了一种用于将正则表达式转换为较少资源密集型表示的方法和装置。 该方法和装置将正则表达式的集合转换为与常规有限状态自动机表示相比最低级表示的存储器要求减小的多级表示。 该方法和装置以保持原始正则表达式集的语义的方式将正则表达式的集合转换为段的集合和较高级表示。 这种转换是通过使用中间形式进行的。 所得到的表示和集合承认了一种实现,其避免了原始表达式的传统实现的潜在昂贵的存储器需求。

    Compression algorithm for generating compressed databases
    8.
    发明申请
    Compression algorithm for generating compressed databases 审中-公开
    用于生成压缩数据库的压缩算法

    公开(公告)号:US20060184556A1

    公开(公告)日:2006-08-17

    申请号:US11326123

    申请日:2006-01-04

    IPC分类号: G06F17/00

    CPC分类号: H03M7/30 G06F16/9014

    摘要: A data compressor performing the compression algorithm compresses an original uncompressed pattern database to form an associated compressed pattern database configured for fast retrieval and verification. For each data pattern, the data compressor stores a data in an address of a first memory table and that is defined by a first segment of a group of bits associated with the data pattern. The data compressor stores a second data in an address of a second memory table and that is defined by a second segment of the group of bits associated with the data pattern and further defined by the first data stored in the first memory.

    摘要翻译: 执行压缩算法的数据压缩器压缩原始未压缩模式数据库以形成配置用于快速检索和验证的相关联的压缩模式数据库。 对于每个数据模式,数据压缩器将数据存储在第一存储器表的地址中,并且由与数据模式相关联的一组位的第一段定义。 数据压缩器将第二数据存储在第二存储器表的地址中,并且由与数据模式相关联的位组的第二段定义,并由存储在第一存储器中的第一数据进一步限定。

    Integrated Circuit Apparatus And Method For High Throughput Signature Based Network Applications
    10.
    发明申请
    Integrated Circuit Apparatus And Method For High Throughput Signature Based Network Applications 审中-公开
    基于高吞吐量签名的网络应用的集成电路设备及方法

    公开(公告)号:US20070230445A1

    公开(公告)日:2007-10-04

    申请号:US11539607

    申请日:2006-10-06

    IPC分类号: H04L12/66

    摘要: An architecture for an integrated circuit apparatus and method that allows significant performance improvements for signature based network applications. In various embodiments the architecture allows high throughput classification of packets into network streams, packet reassembly of such streams, filtering and pre-processing of such streams, pattern matching on header and payload content of such streams, and action execution based upon rule-based policy for multiple network applications, simultaneously at wire speed. The present invention is improved over the prior art designs, in performance, flexibility and pattern database size.

    摘要翻译: 用于集成电路装置和方法的架构,其允许基于签名的网络应用程序的显着性能改进。 在各种实施例中,架构允许分组进入网络流的高吞吐量分类,这样的流的分组重组,对这些流的过滤和预处理,这些流的报头和有效载荷内容上的模式匹配以及基于规则的策略的动作执行 对于多个网络应用,同时以线速度。 在现有技术设计中,在性能,灵活性和模式数据库大小方面改进了本发明。