-
公开(公告)号：US20200052683A1
公开(公告)日：2020-02-13
申请号：US16544477
申请日：2019-08-19
发明人： Jae Won Choi , Sungho Beck , Richard Turkson , Johnny Klarenbeek , Bixia Li
摘要： Channel switchover power multiplexer circuits, and methods of operating the same are disclosed. An example power multiplexer a first transistor coupled to a first input, a second transistor coupled to the first transistor to couple a first voltage at the first input to an output, a third transistor coupled to a second input, a fourth transistor coupled to the third transistor to couple a second voltage at the second input to the output, a diode amplifier to provide a third voltage to a gate of the first transistor to block a reverse current, and a soft-start amplifier to provide a fourth voltage to a gate of the fourth transistor to turn on (with adjustable VOUT ramp rate) the fourth transistor with a constant ramp rate.
-
公开(公告)号：US10432185B1
公开(公告)日：2019-10-01
申请号：US16119902
申请日：2018-08-31
发明人： Jae Won Choi , Richard Turkson
IPC分类号： H03K17/0812 , H01L27/06
摘要： A system includes a storage capacitor coupled between an input voltage source and a ground terminal, a voltage sensing circuit coupled to the input voltage source and to the storage capacitor, a first transistor coupled to the voltage sensing circuit, a current mirror circuit coupled to the first transistor, a diode coupled between the storage capacitor and the current mirror circuit, and a second transistor configured to couple between a gate of a power switching device and the ground terminal. A gate of the second transistor is coupled to the storage capacitor by way of the voltage sensing circuit.
-
公开(公告)号：US10432184B1
公开(公告)日：2019-10-01
申请号：US16217658
申请日：2018-12-12
发明人： Jae Won Choi , Sungho Beck , Richard Turkson , Johnny Klarenbeek , Bixia Li
摘要： Channel switchover power multiplexer circuits, and methods of operating the same are disclosed. An example power multiplexer a first transistor coupled to a first input, a second transistor coupled to the first transistor to couple a first voltage at the first input to an output, a third transistor coupled to a second input, a fourth transistor coupled to the third transistor to couple a second voltage at the second input to the output, a diode amplifier to provide a third voltage to a gate of the first transistor to block a reverse current, and a soft-start amplifier to provide a fourth voltage to a gate of the fourth transistor to turn on (with adjustable VOUT ramp rate) the fourth transistor with a constant ramp rate.
-
公开(公告)号：US10756731B2
公开(公告)日：2020-08-25
申请号：US16279422
申请日：2019-02-19
发明人： Richard Turkson , Sungho Beck , Jae Won Choi , Johnny Klarenbeek
IPC分类号： H03K17/693
摘要： A power source multiplexer includes a first switch circuit connected between a first input voltage source node and an output voltage node. A second switch circuit is connected between a second input voltage source node and the output voltage node. A driver circuit is configured to provide a steady-state current to drive one of the first or second switch circuits to electrically connect the respective input voltage source node to the output voltage node. A boost circuit is configured to boost the steady-state current for a switching time interval when switching from one of the input voltage source nodes being connected to the output node to the other of the input voltage source nodes being connected to the output voltage node.
-
5.发明授权公开(公告)号：US08988131B2
公开(公告)日：2015-03-24
申请号：US13946345
申请日：2013-07-19
IPC分类号： H03K17/04 , H03K17/284
CPC分类号： H03K17/284 , H03K17/163
摘要： The disclosed transistor switching methodology enables independent control of transistor turn-on delay and slew rate, including charging, during a pre-charge period, a transistor control input to a threshold voltage VT with a predetermined turn-on delay; and then charging, during a switch-on period, the transistor control input from VT to an operating point with a predetermined slew rate. This methodology is adaptable to load switching applications, for example, to control a high side/low side load switch such that, during the switch on period, the output voltage supplied to the load rises from zero volts to an operating load voltage with the predetermined slew rate. In one embodiment, I_delay and I_slew_rate currents are used to charge the transistor control input respectively during the pre-charge and switch-on periods. In another embodiment, the I-delay and I-slew rate currents are controlled by a replica switch with a control input coupled to the control input of a main switch, with the replica switch characterized by a threshold voltage substantially identical to the main switch threshold voltage VT.
摘要翻译： 所公开的晶体管开关方法能够独立地控制晶体管导通延迟和转换速率，包括在预充电周期期间以预定导通延迟将晶体管控制输入到阈值电压VT; 然后在接通周期期间，以VT以预定的转换速率从VT向工作点输入晶体管。 该方法适用于负载开关应用，例如，用于控制高端/低端负载开关，使得在开启期间，提供给负载的输出电压从零伏特升高到具有预定的工作负载电压 压摆率 在一个实施例中，I_delay和I_slew_rate电流用于在预充电和接通周期期间分别对晶体管控制输入充电。 在另一个实施例中，I延迟和I转换速率电流由具有耦合到主开关的控制输入的控制输入的复制开关控制，其中复制开关的特征在于与主开关阈值基本相同的阈值电压 电压VT。
-
公开(公告)号：US10700675B2
公开(公告)日：2020-06-30
申请号：US16544477
申请日：2019-08-19
发明人： Jae Won Choi , Sungho Beck , Richard Turkson , Johnny Klarenbeek , Bixia Li
摘要： Channel switchover power multiplexer circuits, and methods of operating the same are disclosed. An example power multiplexer a first transistor coupled to a first input, a second transistor coupled to the first transistor to couple a first voltage at the first input to an output, a third transistor coupled to a second input, a fourth transistor coupled to the third transistor to couple a second voltage at the second input to the output, a diode amplifier to provide a third voltage to a gate of the first transistor to block a reverse current, and a soft-start amplifier to provide a fourth voltage to a gate of the fourth transistor to turn on (with adjustable VOUT ramp rate) the fourth transistor with a constant ramp rate.
-
公开(公告)号：US20150028922A1
公开(公告)日：2015-01-29
申请号：US14289468
申请日：2014-05-28
IPC分类号： H03K17/14
CPC分类号： H03K17/145
摘要： A methodology for controlling FET switch-on with VGS temperature compensation is based on establishing a VGS clamping voltage with PTAT and CTAT voltage references with complimentary temperature coefficients. In one embodiment, the methodology can include: (a) generating a PTAT current from a PTAT ΔVBE current source including a ΔVBE resistor; (b) supplying the PTAT current to the gate node to control FET switch-on; and (c) establishing a temperature compensated VGS clamping voltage at the gate node. The VGS clamping voltage can be established with gate control circuitry that includes the PTAT and CTAT voltage references. A PTAT voltage VPTAT is dropped across a PTAT resistor RPTAT characterized by a temperature coefficient substantially the same as the ΔVBE resistor. The CTAT voltage VCTAT is dropped across one or more CTAT VBE component(s) each characterized by a VBE,CTAT voltage drop with a CTAT temperature coefficient. As a result, the (positive) temperature dependence of the VPTAT voltage reference is compensated by the (negative) temperature dependence of the VCTAT voltage reference.
摘要翻译： 使用VGS温度补偿控制FET接通的方法是基于使用具有互补温度系数的PTAT和CTAT电压基准建立VGS钳位电压。 在一个实施例中，该方法可以包括：（a）从包括＆Dgr; VBE电阻器的PTAT＆Dgr; VBE电流源产生PTAT电流; （b）向门节点提供PTAT电流以控制FET接通; 和（c）在栅极节点处建立温度补偿的VGS钳位电压。 可以通过包括PTAT和CTAT电压基准的门控电路建立VGS钳位电压。 PTAT电压VPTAT通过PTAT电阻RPTAT下降，其特征在于温度系数与＆Dgr; VBE电阻基本相同。 CTAT电压VCTAT被放在一个或多个CTAT VBE分量上，每个CTAT VBE分量的特征在于具有CTAT温度系数的VBE，CTAT电压降。 结果，VPTAT电压基准的（正）温度依赖性由VCTAT参考电压的（负）温度依赖性补偿。
-
8.发明申请公开(公告)号：US20150022258A1
公开(公告)日：2015-01-22
申请号：US13946345
申请日：2013-07-19
IPC分类号： H03K17/284
CPC分类号： H03K17/284 , H03K17/163
摘要： The disclosed transistor switching methodology enables independent control of transistor turn-on delay and slew rate, including charging, during a pre-charge period, a transistor control input to a threshold voltage VT with a predetermined turn-on delay; and then charging, during a switch-on period, the transistor control input from VT to an operating point with a predetermined slew rate. This methodology is adaptable to load switching applications, for example, to control a high side/low side load switch such that, during the switch on period, the output voltage supplied to the load rises from zero volts to an operating load voltage with the predetermined slew rate. In one embodiment, I_delay and I_slew_rate currents are used to charge the transistor control input respectively during the pre-charge and switch-on periods. In another embodiment, the I-delay and I-slew rate currents are controlled by a replica switch with a control input coupled to the control input of a main switch, with the replica switch characterized by a threshold voltage substantially identical to the main switch threshold voltage VT.
摘要翻译： 所公开的晶体管开关方法能够独立地控制晶体管导通延迟和转换速率，包括在预充电周期期间以预定导通延迟将晶体管控制输入到阈值电压VT; 然后在接通周期期间，以VT以预定的转换速率从VT向工作点输入晶体管。 该方法适用于负载开关应用，例如，用于控制高端/低端负载开关，使得在开启期间，提供给负载的输出电压从零伏特升高到具有预定的工作负载电压 压摆率 在一个实施例中，I_delay和I_slew_rate电流用于在预充电和接通周期期间分别对晶体管控制输入充电。 在另一个实施例中，I延迟和I转换速率电流由具有耦合到主开关的控制输入的控制输入的复制开关控制，其中复制开关的特征在于与主开关阈值基本相同的阈值电压 电压VT。
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.012 秒)
