公开(公告)号：US20020190794A1

公开(公告)日：2002-12-19

申请号：US10209767

申请日：2002-07-31

申请人： Texas Instruments Tucson Corporation

发明人： Kenneth W. Murray ,  Joel M. Halbert

IPC分类号： H03F003/45

CPC分类号： H03F3/3079 ,  H03F3/3066 ,  H03F3/3076 ,  H03F3/3081 ,  H03F3/343 ,  H03F3/45139 ,  H03F3/45152 ,  H03F3/45475 ,  H03F3/45502 ,  H03F3/4556 ,  H03F3/456 ,  H03F3/45609 ,  H03F3/45937

摘要： A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

摘要翻译： 根据本发明的偏轨缓冲电路和方法克服了现有技术的许多缺点。 用于提供参考信号的偏置轨缓冲电路被适当地配置为吸收出现在输出参考信号上的外部干扰。 用于吸收出现在输出参考信号处的外部干扰的方法适当地包括使用互补晶体管来根据外部干扰是否对输出参考信号提供减小或增加而将电流和电流吸收到所述输出参考信号 。 偏置轨缓冲电路适当地包括输入晶体管，第一对互补晶体管和第二对互补晶体管，使得第二对互补晶体管操作以源电流和吸收电流以吸收施加在所述输出参考信号上的外部干扰 。