公开(公告)号：US10074900B2

公开(公告)日：2018-09-11

申请号：US15018747

申请日：2016-02-08

申请人： The Boeing Company

发明人： Julio A. Navarro ,  Douglas A. Pietila

IPC分类号： H01Q3/26 ,  H01P3/16 ,  H01Q21/00 ,  H05K3/30 ,  H01Q1/02

CPC分类号： H01Q3/26 ,  H01P3/16 ,  H01Q1/02 ,  H01Q3/267 ,  H01Q13/06 ,  H01Q21/0006 ,  H01Q21/0025 ,  H01Q21/0093 ,  H05K3/30

摘要： Systems and methods according to one or more embodiments are provided for a scalable planar phased array antenna subarray tile assembly. A scalable phased array antenna subarray tile assembly is implemented as a printed wiring board (PWB) with antenna elements coupled to the PWB. In one example, a PWB includes integrated circuit die attached directly to a first surface of the PWB and couple to antenna elements coupled on a second surface of the PWB. First conductive vias extend through a first subset of PWB layers and couple to the integrated circuit die. Second conductive vias, larger than the first, extend through a second subset of PWB layers and couple to the antenna elements. A conductive trace couples the first and second conductive vias on a PWB layer. The second conductive vias are offset from the first to provide a thermal mechanical stress relief to the integrated circuit die.

公开(公告)号：US20170229775A1

公开(公告)日：2017-08-10

申请号：US15018747

申请日：2016-02-08

申请人： The Boeing Company

发明人： Julio A. Navarro ,  Douglas A. Pietila

IPC分类号： H01Q3/26 ,  H01P3/16 ,  H05K3/30 ,  H01Q21/00

CPC分类号： H01Q3/26 ,  H01P3/16 ,  H01Q1/02 ,  H01Q3/267 ,  H01Q21/0006 ,  H01Q21/0025 ,  H01Q21/0093 ,  H05K3/30

摘要： Systems and methods according to one or more embodiments are provided for a scalable planar phased array antenna subarray tile assembly. A scalable phased array antenna subarray tile assembly is implemented as a printed wiring board (PWB) with antenna elements coupled to the PWB. In one example, a PWB includes integrated circuit die attached directly to a first surface of the PWB and couple to antenna elements coupled on a second surface of the PWB. First conductive vias extend through a first subset of PWB layers and couple to the integrated circuit die. Second conductive vias, larger than the first, extend through a second subset of PWB layers and couple to the antenna elements. A conductive trace couples the first and second conductive vias on a PWB layer. The second conductive vias are offset from the first to provide a thermal mechanical stress relief to the integrated circuit die.