Method and apparatus for dealing with write errors when writing information data into flash memory devices
    1.
    发明授权
    Method and apparatus for dealing with write errors when writing information data into flash memory devices 有权
    在将信息数据写入闪存设备时处理写入错误的方法和装置

    公开(公告)号:US08352780B2

    公开(公告)日:2013-01-08

    申请号:US12819432

    申请日:2010-06-21

    IPC分类号: G06F11/00

    摘要: For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.

    摘要翻译: 对于写入,闪存设备以面向页面的模式进行物理访问,但是这样的设备在操作中不会出错。 根据本发明,当将总线写入周期中的信息数据以顺序的方式写入分配给公共数据总线的闪存器件中时,所述闪存器件中的至少一个不被馈送用于与所述信息数据的当前部分一起存储 。 如果在将当前信息数据部分写入当前所述闪速存储器件的页面中发生错误的情况下,将所述当前信息数据部分写入非闪存存储器。 在下一个总线写周期期间,当包含该故障页的闪存设备通常是空闲时,该空闲时间段用于将所述信息数据的相应存储部分从所述非闪存存储器复制到该非闪存存储器的非缺陷页 闪存设备。

    METHOD AND APPARATUS FOR DEALING WITH WRITE ERRORS WHEN WRITING INFORMATION DATA INTO FLASH MEMORY DEVICES
    2.
    发明申请
    METHOD AND APPARATUS FOR DEALING WITH WRITE ERRORS WHEN WRITING INFORMATION DATA INTO FLASH MEMORY DEVICES 有权
    在将信息数据写入闪存存储器件时处理写入错误的方法和装置

    公开(公告)号:US20100332891A1

    公开(公告)日:2010-12-30

    申请号:US12819432

    申请日:2010-06-21

    IPC分类号: G06F11/20

    摘要: For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.

    摘要翻译: 对于写入,闪存设备以面向页面的模式进行物理访问,但是这样的设备在操作中不会出错。 根据本发明,当将总线写入周期中的信息数据以顺序的方式写入分配给公共数据总线的闪存器件中时,所述闪存器件中的至少一个不被馈送用于与所述信息数据的当前部分一起存储 。 在将当前信息数据部分写入当前所述闪速存储器件的页面的情况下发生错误的情况下,将所述当前信息数据部分写入非闪存存储器。 在下一个总线写周期期间,当包含该故障页的闪存设备通常是空闲时,该空闲时间段用于将所述信息数据的相应存储部分从所述非闪存存储器复制到该非闪存存储器的非缺陷页 闪存设备。

    Method and device for recording digital data
    3.
    发明授权
    Method and device for recording digital data 有权
    用于记录数字数据的方法和装置

    公开(公告)号:US07916995B2

    公开(公告)日:2011-03-29

    申请号:US11403240

    申请日:2006-04-12

    IPC分类号: H04N7/26

    CPC分类号: H04N9/8063

    摘要: Various applications record or handle uncompressed video, where the amount of information needed for each frame or field is constant, based on the video frame rate and color resolution of each pixel. Since various video frame rates and audio sample rates are defined and can be combined independently, the amount of audio samples per video frame may vary. The disclosed method allows packing audio samples and video samples into constant size containers, e.g. MXF containers, so that there is an integer amount of audio samples within the time period needed for one video frame, independent from the used video raster. The method includes generating constant length KLV encoded video packets, generating variable length KLV encoded audio packets corresponding to the same time period as the video packets, generating variable length KLV encoded data packets, wherein the sum of the lengths of the audio packet and the data packet are constant, and generating from said packets a constant size content package.

    摘要翻译: 基于每个像素的视频帧速率和颜色分辨率,各种应用记录或处理未压缩视频,其中每个帧或场所需的信息量是恒定的。 由于定义各种视频帧速率和音频采样率,并且可以独立地组合,因此每个视频帧的音频采样量可能会变化。 所公开的方法允许将音频样本和视频样本包装成恒定尺寸的容器,例如。 MXF容器,使得在一个视频帧所需的时间段内存在整数量的音频样本,与使用的视频光栅无关。 该方法包括生成恒定长度的KLV编码视频分组,产生与视频分组相同的时间段的可变长度KLV编码音频分组,生成可变长度KLV编码数据分组,其中音频分组和数据的长度之和 分组是恒定的,并且从所述分组生成恒定大小的内容包。

    Method and device for recording digital data
    4.
    发明申请
    Method and device for recording digital data 有权
    用于记录数字数据的方法和装置

    公开(公告)号:US20060233534A1

    公开(公告)日:2006-10-19

    申请号:US11403240

    申请日:2006-04-12

    IPC分类号: H04N7/26

    CPC分类号: H04N9/8063

    摘要: Various applications record or handle uncompressed video, where the amount of information needed for each frame or field is constant, based on the video frame rate and color resolution of each pixel. Since various video frame rates and audio sample rates are defined and can be combined independently, the amount of audio samples per video frame may vary. The disclosed method allows packing audio samples and video samples into constant size containers, e.g. MXF containers, so that there is an integer amount of audio samples within the time period needed for one video frame, independent from the used video raster. The method includes generating constant length KLV encoded video packets, generating variable length KLV encoded audio packets corresponding to the same time period as the video packets, generating variable length KLV encoded data packets, wherein the sum of the lengths of the audio packet and the data packet are constant, and generating from said packets a constant size content package.

    摘要翻译: 基于每个像素的视频帧速率和颜色分辨率,各种应用记录或处理未压缩视频,其中每个帧或场所需的信息量是恒定的。 由于定义各种视频帧速率和音频采样率,并且可以独立地组合,因此每个视频帧的音频采样量可能会变化。 所公开的方法允许将音频样本和视频样本包装成恒定尺寸的容器,例如。 MXF容器,使得在一个视频帧所需的时间段内存在整数量的音频样本,与使用的视频光栅无关。 该方法包括生成恒定长度的KLV编码视频分组,产生与视频分组相同的时间段的可变长度KLV编码音频分组,生成可变长度KLV编码数据分组,其中音频分组和数据的长度之和 分组是恒定的,并且从所述分组生成恒定大小的内容包。

    Interface circuit connecting a device with a bridge portal function to a communication bus
    7.
    发明授权
    Interface circuit connecting a device with a bridge portal function to a communication bus 失效
    将具有桥接门户功能的设备连接到通信总线的接口电路

    公开(公告)号:US07580420B2

    公开(公告)日:2009-08-25

    申请号:US10476420

    申请日:2002-04-18

    IPC分类号: H04L12/28

    摘要: A wireless extension of the IEEE 1394 bus where two clusters of 1394 devices are linked by a wireless bridge. The device clusters communicate without being bridge-aware. The wireless bridge provides for a bus reset isolation. The wireless extension including a buffer memory for storing self-identification packets in the 1394 interfaces of both boxes of the wireless bridge. With these buffer memories the self-identification packets of the bus stations in the other cluster can be collected and they can be read out during the self-configuration phase of the network after a bus reset when the bus grant is assigned to the box of the wireless bridge that is also connected to the bus where the bus reset has occurred. The physical layer block of the 1394 interface transmits artificial self-identification packets for all bus stations of the other cluster.

    摘要翻译: IEEE 1394总线的无线扩展,其中两个1394设备的集群通过无线网桥链接。 设备群集通信而不需要桥接。 无线网桥提供总线复位隔离。 无线扩展包括用于在无线网桥的两个盒的1394接口中存储自识别分组的缓冲存储器。 利用这些缓冲存储器,可以收集另一个集群中的总线站的自身识别分组,并且可以在总线复位之后在网络的自配置阶段期间读出总线授权被分配给 也连接到总线复位发生的总线的无线网桥。 1394接口的物理层块为另一个集群的所有总线站发送人工自我识别数据包。

    Method for determining a timeout delay in a network
    8.
    发明授权
    Method for determining a timeout delay in a network 有权
    确定网络超时延迟的方法

    公开(公告)号:US07461156B2

    公开(公告)日:2008-12-02

    申请号:US10399273

    申请日:2001-10-18

    IPC分类号: G06F15/16

    摘要: A method for determining a remote timeout parameter in a network comprising a link between a first bus and a third bus. The link is implemented through a first and a second bridge portal connected respectively to the first and the third bus, and is modelized as a second bus connected to the first bus and the third bus through bridges. Upon solicitation to provide its contribution to a timeout for a request subaction, the first bridge portal adds to the timeout contribution the first bridge portal's maximum request subaction processing time and either the link's maximum transmission time of half of the link's maximum transmission time, depending on the location of the destination node of the request subaction.

    摘要翻译: 一种用于确定包括第一总线和第三总线之间的链路的网络中的远程超时参数的方法。 链路通过分别连接到第一和第三总线的第一和第二桥接端口来实现,并且被建模为通过桥连接到第一总线和第三总线的第二总线。 在要求提供其对请求子动作的超时的贡献时,第一桥接门户将第一桥接门户的最大请求子动作处理时间的延时贡献和链路的最大传输时间的一半的链路的最大传输时间添加到超时贡献中,这取决于 请求子操作的目标节点的位置。

    Physical layer circuit and interface circuit
    9.
    发明授权
    Physical layer circuit and interface circuit 有权
    物理层电路和接口电路

    公开(公告)号:US07346073B2

    公开(公告)日:2008-03-18

    申请号:US10501820

    申请日:2003-01-11

    IPC分类号: H04L12/66

    摘要: The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit. These configuration means enable either to configure the physical layer circuit as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory or else configuring the physical layer circuit as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.

    摘要翻译: 本发明涉及用于IEEE1394总线的物理层电路。 被认为是两个1394设备的集群通过无线网桥彼此链接的场景。 一个集群的设备应与其他集群的设备进行通信,而不需要桥接。 在这种情况下,每个集群中存在两种不同类型的1394设备。 一个设备是桥接门户,并具有桥接功能。 群集中的所有其他1394设备将不具有桥接功能。 由于具有桥接功能的设备需要具有用于缓冲节点ID分组的特定缓冲存储器,通常存在不同类型的1394设备所需的两种不同类型的物理层电路。 本发明涉及如何实现在不同类型的1394设备中使用相同类型的物理层电路的问题。 本发明通过物理层电路中的配置手段解决了这个问题。 这些配置意味着能够将物理层电路配置为通过将所述节点ID分组缓冲在所述缓冲存储器中来支持桥接功能的桥接门户物理层电路,或者将物理层电路配置为禁用缓冲的标准物理层电路 的所述节点ID分组。 新型物理层电路与标准物理层电路引脚兼容。

    Physical layer circuit and interface circuit
    10.
    发明申请
    Physical layer circuit and interface circuit 有权
    物理层电路和接口电路

    公开(公告)号:US20050033894A1

    公开(公告)日:2005-02-10

    申请号:US10501820

    申请日:2003-01-11

    摘要: The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit. These configuration means enable either to configure the physical layer circuit as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory or else configuring the physical layer circuit as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.

    摘要翻译: 本发明涉及用于IEEE1394总线的物理层电路。 被认为是两个1394设备的集群通过无线网桥彼此链接的场景。 一个集群的设备应与其他集群的设备进行通信,而不需要桥接。 在这种情况下,每个集群中存在两种不同类型的1394设备。 一个设备是桥接门户,并具有桥接功能。 群集中的所有其他1394设备将不具有桥接功能。 由于具有桥接功能的设备需要具有用于缓冲节点ID分组的特定缓冲存储器,通常存在不同类型的1394设备所需的两种不同类型的物理层电路。 本发明涉及如何实现在不同类型的1394设备中使用相同类型的物理层电路的问题。 本发明通过物理层电路中的配置手段解决了这个问题。 这些配置意味着能够将物理层电路配置为通过将所述节点ID分组缓冲在所述缓冲存储器中来支持桥接功能的桥接门户物理层电路,或者将物理层电路配置为禁用缓冲的标准物理层电路 的所述节点ID分组。 新型物理层电路与标准物理层电路引脚兼容。