公开(公告)号：US07580420B2

公开(公告)日：2009-08-25

申请号：US10476420

申请日：2002-04-18

申请人： Siegfried Schweidler ,  Dieter Haupt ,  Klaus Gaedke ,  Malte Borsum ,  Herbert Schütze

发明人： Siegfried Schweidler ,  Dieter Haupt ,  Klaus Gaedke ,  Malte Borsum ,  Herbert Schütze

IPC分类号： H04L12/28

CPC分类号： H04L12/40091 ,  H04L12/4011 ,  H04L12/40117 ,  H04L12/4625 ,  H04L12/6418

摘要： A wireless extension of the IEEE 1394 bus where two clusters of 1394 devices are linked by a wireless bridge. The device clusters communicate without being bridge-aware. The wireless bridge provides for a bus reset isolation. The wireless extension including a buffer memory for storing self-identification packets in the 1394 interfaces of both boxes of the wireless bridge. With these buffer memories the self-identification packets of the bus stations in the other cluster can be collected and they can be read out during the self-configuration phase of the network after a bus reset when the bus grant is assigned to the box of the wireless bridge that is also connected to the bus where the bus reset has occurred. The physical layer block of the 1394 interface transmits artificial self-identification packets for all bus stations of the other cluster.

摘要翻译： IEEE 1394总线的无线扩展，其中两个1394设备的集群通过无线网桥链接。 设备群集通信而不需要桥接。 无线网桥提供总线复位隔离。 无线扩展包括用于在无线网桥的两个盒的1394接口中存储自识别分组的缓冲存储器。 利用这些缓冲存储器，可以收集另一个集群中的总线站的自身识别分组，并且可以在总线复位之后在网络的自配置阶段期间读出总线授权被分配给 也连接到总线复位发生的总线的无线网桥。 1394接口的物理层块为另一个集群的所有总线站发送人工自我识别数据包。

公开(公告)号：US07346073B2

公开(公告)日：2008-03-18

申请号：US10501820

申请日：2003-01-11

申请人： Dieter Haupt ,  Klaus Gaedke ,  Siegfried Schweidler

发明人： Dieter Haupt ,  Klaus Gaedke ,  Siegfried Schweidler

IPC分类号： H04L12/66

CPC分类号： H04L12/40078 ,  H04L12/40091 ,  H04L12/4011 ,  H04L12/64

摘要： The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit. These configuration means enable either to configure the physical layer circuit as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory or else configuring the physical layer circuit as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.

摘要翻译： 本发明涉及用于IEEE1394总线的物理层电路。 被认为是两个1394设备的集群通过无线网桥彼此链接的场景。 一个集群的设备应与其他集群的设备进行通信，而不需要桥接。 在这种情况下，每个集群中存在两种不同类型的1394设备。 一个设备是桥接门户，并具有桥接功能。 群集中的所有其他1394设备将不具有桥接功能。 由于具有桥接功能的设备需要具有用于缓冲节点ID分组的特定缓冲存储器，通常存在不同类型的1394设备所需的两种不同类型的物理层电路。 本发明涉及如何实现在不同类型的1394设备中使用相同类型的物理层电路的问题。 本发明通过物理层电路中的配置手段解决了这个问题。 这些配置意味着能够将物理层电路配置为通过将所述节点ID分组缓冲在所述缓冲存储器中来支持桥接功能的桥接门户物理层电路，或者将物理层电路配置为禁用缓冲的标准物理层电路 的所述节点ID分组。 新型物理层电路与标准物理层电路引脚兼容。

公开(公告)号：US20050033894A1

公开(公告)日：2005-02-10

申请号：US10501820

申请日：2003-01-11

申请人： Dieter Haupt ,  Klaus Gaedke ,  Siegfried Schweidler

发明人： Dieter Haupt ,  Klaus Gaedke ,  Siegfried Schweidler

IPC分类号： H04L12/46 ,  H04L12/40 ,  H04L12/64 ,  G06F13/36

CPC分类号： H04L12/40078 ,  H04L12/40091 ,  H04L12/4011 ,  H04L12/64

摘要： The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit. These configuration means enable either to configure the physical layer circuit as a bridge portal physical layer circuit supporting the bridge functionality by buffering said node-ID packets in said buffer memory or else configuring the physical layer circuit as a standard physical layer circuit that disables the buffering of said node-ID packets. The new type of physical layer circuit is pin compatible with a standard physical layer circuit.

摘要翻译： 本发明涉及用于IEEE1394总线的物理层电路。 被认为是两个1394设备的集群通过无线网桥彼此链接的场景。 一个集群的设备应与其他集群的设备进行通信，而不需要桥接。 在这种情况下，每个集群中存在两种不同类型的1394设备。 一个设备是桥接门户，并具有桥接功能。 群集中的所有其他1394设备将不具有桥接功能。 由于具有桥接功能的设备需要具有用于缓冲节点ID分组的特定缓冲存储器，通常存在不同类型的1394设备所需的两种不同类型的物理层电路。 本发明涉及如何实现在不同类型的1394设备中使用相同类型的物理层电路的问题。 本发明通过物理层电路中的配置手段解决了这个问题。 这些配置意味着能够将物理层电路配置为通过将所述节点ID分组缓冲在所述缓冲存储器中来支持桥接功能的桥接门户物理层电路，或者将物理层电路配置为禁用缓冲的标准物理层电路 的所述节点ID分组。 新型物理层电路与标准物理层电路引脚兼容。

公开(公告)号：US07093056B1

公开(公告)日：2006-08-15

申请号：US09937468

申请日：2000-03-20

申请人： Timothy Heighway ,  Klaus Gaedke ,  Siegfried Schweidler

发明人： Timothy Heighway ,  Klaus Gaedke ,  Siegfried Schweidler

IPC分类号： G06F13/36 ,  H03M13/00

CPC分类号： H04L12/40058 ,  H04L12/40071 ,  H04L12/40117 ,  Y10S370/912

摘要： The format of the transmission of isochronous data packets via the IEEE 1394 bus is defined in the IEC 61883 Standard. A bus packet used to transmit the data has a header at the beginning, which header describes the format of the bus packet. This is then followed by an isochronous data format header, which defines the data format of the useful data in the useful packet. The invention is concerned with the problem of compiling a bus packet for transmission via the 1394 bus. In the case of the invention, this is done in such a way that when the isochronous data transmission is set up, the isochronous data format header prescribed by the application is written both to a special register that is provided and to the buffer memory for the bus packets and the useful data are attached thereto. As a result, it is then possible that a data transmitting section has to take the data to be transmitted, including the isochronous data format header, only from the buffer memory. A multiplex operation joining together the data and the isochronous data format header need not then be effected for the transmission of the data.

摘要翻译： 通过IEEE 1394总线传输同步数据包的格式在IEC 61883标准中定义。 用于传输数据的总线包在开始时具有标题，该标题描述总线包的格式。 之后是同步数据格式头，其定义有用数据包中的有用数据的数据格式。 本发明涉及编译用于通过1394总线传输的总线分组的问题。 在本发明的情况下，这样做的方式是当同步数据传输被建立时，由应用程序规定的同步数据格式头部被写入提供的专用寄存器和写入缓冲存储器 总线分组和有用数据附加到其上。 结果，数据发送部分可能只能从缓冲存储器获取包括同步数据格式报头的要发送的数据。 连接在一起的数据和等时数据格式头的多路复用操作不必然后被实现用于传输数据。

公开(公告)号：US20050262283A1

公开(公告)日：2005-11-24

申请号：US10520049

申请日：2003-06-17

申请人： Timothy Heighway ,  Klaus Gaedke ,  Siegfried Schweidler

发明人： Timothy Heighway ,  Klaus Gaedke ,  Siegfried Schweidler

IPC分类号： H04L29/10 ,  H04L12/40 ,  H04L12/64 ,  H04L29/06 ,  G06F13/14

CPC分类号： H04L12/40058 ,  H04L12/40078 ,  H04L12/403 ,  H04L29/06 ,  H04L69/18

摘要： According to the IEEE1394 bus protocol, priority is given to isochronous data packets. Data transfer is done in transfer cycles under the control of a cycle master. It depends on the allocated bandwidth for isochronous data how much transport capacity is available in a transfer cycle. To managed the mixed data transfer in one cycle it is specified that the bus nodes not having isochronous data to transfer need to wait with their transmission requests until the end of the isochronous data transfers in the cycle indicated with a sub-action gap. The invention aims to improve the efficiency of data transport for the case that none of the bus nodes need to transfer isochronous data. The data link layer devices according to the invention includes means for checking whether isochronous data is to be transferred and if not they switch over to a no cycle master state, in which the local cycle synchronization events are ignored. The nodes need not wait for a sub-action gap after a local cycle event before drawing asynchronous transmission requests.

摘要翻译： 根据IEEE1394总线协议，给予同步数据包优先。 数据传输在循环主控器的控制下进行。 这取决于等时数据的分配带宽，传输周期中可用的传输容量有多少。 为了在一个周期内管理混合数据传输，规定不具有传输等时数据的总线节点需要等待其传输请求，直到在具有子动作间隙的循环中同步数据传输结束。 本发明的目的是在没有一个总线节点需要传送等时数据的情况下提高数据传输的效率。 根据本发明的数据链路层设备包括用于检查是否要传输同步数据的装置，以及如果不是它们切换到无循环主状态，其中忽略本地周期同步事件。 在绘制异步传输请求之前，节点不需要等待本地周期事件之后的子动作间隙。

公开(公告)号：US07254662B2

公开(公告)日：2007-08-07

申请号：US10520049

申请日：2003-06-17

申请人： Timothy Heighway ,  Klaus Gaedke ,  Siegfried Schweidler

发明人： Timothy Heighway ,  Klaus Gaedke ,  Siegfried Schweidler

IPC分类号： G06F13/14

CPC分类号： H04L12/40058 ,  H04L12/40078 ,  H04L12/403 ,  H04L29/06 ,  H04L69/18

摘要： According to the IEEE1394 bus protocol, priority is given to isochronous data packets. Data transfer is done in transfer cycles under the control of a cycle master. It depends on the allocated bandwidth for isochronous data how much transport capacity is available in a transfer cycle. To managed the mixed data transfer in one cycle it is specified that the bus nodes not having isochronous data to transfer need to wait with their transmission requests until the end of the isochronous data transfers in the cycle indicated with a sub-action gap. The invention aims to improve the efficiency of data transport for the case that none of the bus nodes need to transfer isochronous data. The data link layer devices according to the invention includes means for checking whether isochronous data is to be transferred and if not they switch over to a no cycle master state, in which the local cycle synchronization events are ignored. The nodes need not wait for a sub-action gap after a local cycle event before drawing asynchronous transmission requests.

摘要翻译： 根据IEEE1394总线协议，给予同步数据包优先。 数据传输在循环主控器的控制下进行。 这取决于等时数据的分配带宽，传输周期中可用的传输容量有多少。 为了在一个周期内管理混合数据传输，规定不具有传输等时数据的总线节点需要等待其传输请求，直到在具有子动作间隙的循环中同步数据传输结束。 本发明的目的是在没有一个总线节点需要传送等时数据的情况下提高数据传输的效率。 根据本发明的数据链路层设备包括用于检查是否要传输同步数据的装置，以及如果不是它们切换到无循环主状态，其中忽略本地周期同步事件。 在绘制异步传输请求之前，节点不需要等待本地周期事件之后的子动作间隙。

公开(公告)号：US06810045B1

公开(公告)日：2004-10-26

申请号：US09623053

申请日：2000-08-24

申请人： Thomas Brune ,  Klaus Gaedke ,  Siegfried Schweidler

发明人： Thomas Brune ,  Klaus Gaedke ,  Siegfried Schweidler

IPC分类号： H04J300

CPC分类号： H04L12/40058 ,  G06F13/387 ,  H04L12/40117

摘要： The invention relates to a way of implementing the so-called “late” check according to IEC 61883 in a link layer IC for the IEEE 1394 Serial Bus in a way which is favourable in terms of expenditure. According to the invention, a specific time model is used which, during the checking of the up-to-dateness of a data packet by comparison with the current bus time, also substantially simplifies the necessary comparison operations by virtue of the fact that it is possible to represent only sections of the time axis by means of a data word with limited bit length.

摘要翻译： 本发明涉及在IEEE 1394串行总线的链路层IC中以一种有利于支出的方式实现根据IEC 61883所谓的“后期”检查的方式。 根据本发明，使用特定的时间模型，在通过与当前总线时间比较来检查数据分组的最新状态期间，基本上简化了必要的比较操作，因为它是 可能仅通过具有有限位长度的数据字来表示时间轴的部分。

公开(公告)号：US06618832B1

公开(公告)日：2003-09-09

申请号：US09515660

申请日：2000-02-29

申请人： Siegfried Schweidler ,  Thomas Brune

发明人： Siegfried Schweidler ,  Thomas Brune

IPC分类号： H03M1305

CPC分类号： H04L49/9057 ,  H04L1/0061 ,  H04L1/0072 ,  H04L12/40058 ,  H04L12/40071 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9036 ,  H04L49/9084 ,  H04L49/9089

摘要： The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. According to the invention the capacity of the on-chip memory becomes assigned in a flexible way in order to be able to meet the requirements for any specific service. Further, the on-chip memory is prevented from storing data packets containing transmission errors by CRC checking on the fly header data and other data. This is performed for asynchronous data packets as well as isochronous data packets, and allows to have a minimum on-chip memory capacity only.

摘要翻译： IEEE1394总线通信协议有三层：物理层，链路层和事务层。 链路层IC实现与外部应用的接口，并准备用于在总线上发送的数据，或解释来自IEEE1394总线的传入数据分组。 物理层IC实现与总线的直接电连接，并控制许多功能，包括在总线上发送数据的仲裁。 根据本发明，以灵活的方式分配片上存储器的容量，以便能够满足任何特定服务的要求。 此外，片上存储器被防止通过对毛头数据和其他数据的CRC校验来存储包含传输错误的数据分组。 这是针对异步数据包和同步数据包执行的，并且允许仅具有最小的片上存储容量。

公开(公告)号：US6058244A

公开(公告)日：2000-05-02

申请号：US848118

申请日：1997-04-28

申请人： Siegfried Schweidler ,  Heinz Werner Keesen

发明人： Siegfried Schweidler ,  Heinz Werner Keesen

IPC分类号： H04N9/80 ,  H04N5/44 ,  H04N7/26 ,  H04N9/797 ,  H04N9/804 ,  H04N11/04 ,  H04N19/98 ,  H04N9/79

CPC分类号： H04N11/048 ,  H04N19/98 ,  H04N9/797 ,  H04N9/8042 ,  H04N7/0122

摘要： A method for digitally transmitting/recording component-coded color television signals includes the step of, upon transition from a first picture aspect ratio to a second picture aspect ratio obtaining at least part of an additionally required transmitting/recording capacity for coding an additionally formed area of pictures with the second picture aspect ratio by vertical sub scanning of one or more chrominance components.

摘要翻译： 用于数字发送/记录分量编码的彩色电视信号的方法包括以下步骤：在从第一图像宽高比转换为第二图像宽高比的步骤中，获得用于对另外形成的区域进行编码的另外所需的发送/记录能力的至少一部分 的具有第二图像宽高比的图像通过垂直子扫描一个或多个色度分量。

公开(公告)号：US06622187B1

公开(公告)日：2003-09-16

申请号：US09583056

申请日：2000-05-30

申请人： Thomas Brune ,  Ralf Ostermann ,  Jens Cahnbley ,  Siegfried Schweidler

发明人： Thomas Brune ,  Ralf Ostermann ,  Jens Cahnbley ,  Siegfried Schweidler

IPC分类号： G06F1300

CPC分类号： H04L12/40117 ,  H04L69/22

摘要： The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. A problem exists due to the fact that the header data of the IEEE1394 asynchronous data packets consists of 32 bit words which have to be interpreted as 32 bit words in the connected application data processing unit (30). The IEEE1394 bus interface unit (20) is defined to be of big endian type. In a little endian type application data processor (30) the data word order can only be correctly interpreted after a byte order change. According to the invention the byte order change is performed in the data link layer unit (21) automatically with hardware circuitry for asynchronous data packets.

摘要翻译： IEEE1394总线通信协议有三层：物理层，链路层和事务层。 链路层IC实现与外部应用的接口，并准备用于在总线上发送的数据，或解释来自IEEE1394总线的传入数据分组。 物理层IC实现与总线的直接电连接，并控制许多功能，包括在总线上发送数据的仲裁。 由于IEEE1394异步数据包的标题数据由连接的应用数据处理单元（30）中必须被解释为32位字的32位字组成，所以存在问题。 IEEE1394总线接口单元（20）被定义为大端子类型。 在一个小端序型应用数据处理器（30）中，数据字顺序只能在字节顺序改变后才能正确解释。 根据本发明，在数据链路层单元（21）中，使用用于异步数据分组的硬件电路自动执行字节顺序改变。