公开(公告)号：US3944746A

公开(公告)日：1976-03-16

申请号：US552433

申请日：1975-02-24

申请人： Thomas Victor Burns ,  Donald Ray Shea

发明人： Thomas Victor Burns ,  Donald Ray Shea

IPC分类号： H04M15/04 ,  H04Q3/545 ,  H04M15/10

CPC分类号： H04Q3/545 ,  H04M15/04

摘要： A stored program digital signal processor (e.g., Digital Equipment Corporation PDP 11/40) is used to collect billing data (e.g., Initial Entry data for Automatic Message Accounting) from a common control circuit (e.g., marker) of a common control automatic telephone switching system (e.g., the Bell System No. 5 Crossbar system). Ten marker control status indicating leads are scanned by the signal processor fast enough to detect any change in the signals on the 10 status leads which, in signal content as a group, represent the control status of the marker at any given time. When two successive prescribed control status changes occur, a large number of marker data leads are scanned by the signal processor so as to allow collection of that data and the storage thereof in a marker core buffer area of the signal processor. The stored data, previously registered in the marker incident to the assumption by the marker of certain control statuses, includes such Initial Entry data as calling circuit identity, called circuit identity, type of call, trunk circuit used, et cetera. The collected data is involved in subsequent processing (not disclosed) of the entire billing data for a call responsive to answer and disconnect timing entries.

摘要翻译： 存储的程序数字信号处理器（例如，Digital Equipment Corporation PDP 11/40）用于从共同的控制自动电话的公共控制电路（例如标记）收集记帐数据（例如，用于自动消息记帐的初始输入数据） 交换系统（例如Bell系统5 Crossbar系统）。 十个标记控制状态指示引线被信号处理器快速扫描，足以检测10个状态引线上的任何信号变化，这些信号作为一组在信号内容中代表标记在任何给定时间的控制状态。 当发生两个连续的规定的控制状态变化时，信号处理器扫描大量的标记数据引线，以便允许将该数据及其存储在信号处理器的标记核心缓冲区中的存储。 事先登记在由某些控制状态的标记假设的标记中的存储数据包括诸如呼叫电路标识，称为电路标识，呼叫类型，使用中继电路的初始条目数据。 收集的数据涉及响应于应答和断开定时条目的呼叫的整个记帐数据的后续处理（未公开）。

公开(公告)号：US3985973A

公开(公告)日：1976-10-12

申请号：US587407

申请日：1975-06-16

申请人： Donald Ray Shea

发明人： Donald Ray Shea

IPC分类号： H04Q3/54 ,  H04Q3/47

CPC分类号： H04Q3/54

摘要： A buffer circuit is disclosed as part of a centralized subsystem in a telephone switching system. The subsystem performs all functions heretofore performed by individual originating registers and communicates with office pretranslators for effecting digit pretranslation. The buffer circuit interfaces a computer of the subsystem with a conventional pretranslator connector for obtaining access to the office pretranslators preferentially over originating registers which are competing for the pretranslators. In response to a single call, the buffer applies a bid for service to each of a plurality of pretranslator connector subgroups in contrast with a bid to a single subgroup from each originating register. In the event the computer receives overlapping calls, the buffer circuit holds the multiple bids for service to preserve their priority status in the queues of the connector subgroups.

摘要翻译： 作为电话交换系统中的集中子系统的一部分，公开了一种缓冲电路。 该子系统执行以前由各个发起的寄存器执行的所有功能，并与办公室预翻译器通信以进行数字预翻译。 缓冲电路将子系统的计算机与常规的预翻译器连接器接口，以便优先地访问与预翻译器竞争的始发寄存器的办公室预翻译器。 响应于单个呼叫，与从每个始发寄存器到单个子组的出价相反，缓冲器针对多个预翻译器连接器子组中的每一个应用出价服务。 在计算机接收到重叠呼叫的情况下，缓冲电路保持服务的多个出价以在连接器子组的队列中保持其优先级状态。