Radio frequency identification tag based tray and tray receiving method and apparatus
    1.
    发明授权
    Radio frequency identification tag based tray and tray receiving method and apparatus 失效
    基于射频识别标签的托盘和托盘接收方法和装置

    公开(公告)号:US07411502B2

    公开(公告)日:2008-08-12

    申请号:US11380729

    申请日:2006-04-28

    CPC分类号: A47J39/006

    摘要: A tray (201) comprises electrically conductive material and has at least one hand-graspable fixture (203). This hand-graspable fixture comprises an electrical conductor (301) disposed in a location that is likely to be operably interacted with by a human who grasps the hand-graspable fixture. A capacitively-coupled RFID tag is then disposed on the hand-graspable fixture with a first antenna plate (303) being electrically coupled to the tray and a second antenna plate (304) that electrically couples to the electrical conductor. A corresponding tray receiving compartment (400) has a front lip (401) over which the tray must pass and upon which the tray will rest when properly disposed within the tray receiving compartment. One or more capacitively-coupled RFID tag reader antennas (402) are disposed proximal to the front lip. These antennas may be positioned to facilitate reading the capacitively-coupled RFID tag when the tray is properly disposed within the tray receiving compartment.

    摘要翻译: 托盘(201)包括导电材料并且具有至少一个可手握固定装置(203)。 这种手持式固定装置包括一个电导体(301),该电导体(301)设置在一个位置上,该位置可能由一个握住手持固定装置的人可操作地相互作用。 然后将电容耦合RFID标签设置在手持式固定装置上,其中电耦合到托盘的第一天线板(303)和电耦合到电导体的第二天线板(304)。 相应的托盘容纳隔间(400)具有前唇(401),当正确地设置在托盘容纳室内时,托盘必须通过该前唇(401),托盘将在该前唇(401)上通过。 一个或多个电容耦合RFID标签读取器天线(402)设置在前唇的近侧。 当托盘适当地设置在托盘容纳室内时,这些天线可被定位成便于读取电容耦合RFID标签。

    Amplifier predistortion system and method
    2.
    发明授权
    Amplifier predistortion system and method 失效
    放大器预失真系统及方法

    公开(公告)号:US06928122B2

    公开(公告)日:2005-08-09

    申请号:US09876803

    申请日:2001-06-07

    IPC分类号: H03F1/32 H04K1/02

    CPC分类号: H03F1/3247 H03F1/3294

    摘要: An adaptive predistortion linearization system includes input path digital-to-analog converters (DACs), error path DACs, a digital signal processor, and a radio frequency (RF) combiner. The digital signal processor includes a look-up table storing complex gain coefficient values. The digital signal processor generates an error signal based on the complex input signal and the complex gain coefficients by using a vector decomposition calculation. Feedback from a power amplifier can be provided to a training algorithm for periodically updating the gain coefficient values stored in the look-up table. By performing separate D/A conversions, the error path and input signals can be separately filtered. This separation also permits the error signal to be decoupled from the complex input signal, which facilitates an improvement in the wide-frequency-offset noise performance of the system.

    摘要翻译: 自适应预失真线性化系统包括输入路径数模转换器(DAC),误差路径DAC,数字信号处理器和射频(RF)组合器。 数字信号处理器包括存储复增益系数值的查找表。 数字信号处理器通过使用矢量分解计算,基于复数输入信号和复数增益系数产生误差信号。 可以将功率放大器的反馈提供给用于周期性地更新存储在查找表中的增益系数值的训练算法。 通过执行单独的D / A转换,可以单独过滤错误路径和输入信号。 该分离还允许误差信号与复合输入信号去耦,这有助于改进系统的高频偏移噪声性能。

    Circuit with a voltage dependent resistor for controlling an on/off state of a transistor
    3.
    发明授权
    Circuit with a voltage dependent resistor for controlling an on/off state of a transistor 失效
    具有用于控制晶体管的导通/截止状态的电压依赖电阻器的电路

    公开(公告)号:US08149027B2

    公开(公告)日:2012-04-03

    申请号:US12166882

    申请日:2008-07-02

    IPC分类号: H03K3/00

    CPC分类号: H03F3/2173

    摘要: An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit. There is also a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor and a voltage dependent non-linear resistor is coupled across the gate electrode and second electrode of the upper transistor. In use, when the lower transistor and upper driver transistor are in a non-conductive state a potential difference across the voltage dependent non-linear resistor is sufficiently small enough to control the upper transistor into a conductive state. Conversely, when the lower transistor and upper driver transistor are in a conductive state the potential difference across the voltage dependent non-linear resistor provides a negative bias to the gate electrode of the upper transistor that has a negative potential sufficient to control the upper transistor into a non-conductive state.

    摘要翻译: 由两个子电路形成的H桥电路,两个子电路通过负载网络彼此耦合,跨越每个子电路的相应负载节点。 两个子电路的每个子电路包括耗尽型上部晶体管,其第二电极耦合到下部晶体管的第一电极。 子电路的负载节点设置在上部晶体管的第二电极和下部晶体管的第一电极之间。 存在耦合到上部晶体管的第一电极的第一电压供应节点和第二电压供应节点耦合到下部晶体管的第二电极。 上驱动晶体管将上晶体管的栅电极选择性地耦合到上驱动电压节点,上驱动晶体管具有耦合到上开关电压电路的控制电极。 还有一个耦合到下部晶体管的栅电极的较低开关电压电源电路,并且依赖于电压的非线性电阻器耦合在上部晶体管的栅电极和第二电极之间。 在使用中,当下晶体管和上驱动晶体管处于非导通状态时,电压相关非线性电阻器两端的电位差足够小以将上晶体管控制为导通状态。 相反,当下晶体管和上驱动晶体管处于导通状态时,电压相关非线性电阻器两端的电位差向上晶体管的栅极提供负偏压,该栅极具有足以控制上晶体管的负电位 非导电状态。

    CIRCUIT WITH ONE OR MORE DEPLETION MODE TRANSISTORS
    4.
    发明申请
    CIRCUIT WITH ONE OR MORE DEPLETION MODE TRANSISTORS 失效
    具有一个或多个绝缘模式晶体管的电路

    公开(公告)号:US20100001701A1

    公开(公告)日:2010-01-07

    申请号:US12166882

    申请日:2008-07-02

    IPC分类号: G05F1/00

    CPC分类号: H03F3/2173

    摘要: An H-bridge circuit formed from two sub-circuits coupled to each other by a load network across a respective load node of each of the sub-circuits. Each sub-circuit of the two sub-circuits comprises a depletion mode upper transistor with a second electrode coupled to a first electrode of a lower transistor. The load node of the sub-circuit is disposed between the second electrode of the upper transistor and the first electrode of a lower transistor. There is a first voltage supply node coupled to a first electrode of the upper transistor and a second voltage supply node is coupled to a second electrode of the lower transistor. An upper driver transistor selectively couples a gate electrode of the upper transistor to an upper drive voltage node, the upper driver transistor having a control electrode coupled to an upper switched voltage supply circuit. There is also a lower switched voltage supply circuit coupled to a gate electrode of the lower transistor and a voltage dependent non-linear resistor is coupled across the gate electrode and second electrode of the upper transistor. In use, when the lower transistor and upper driver transistor are in a non-conductive state a potential difference across the voltage dependent non-linear resistor is sufficiently small enough to control the upper transistor into a conductive state. Conversely, when the lower transistor and upper driver transistor are in a conductive state the potential difference across the voltage dependent non-linear resistor provides a negative bias to the gate electrode of the upper transistor that has a negative potential sufficient to control the upper transistor into a non-conductive state.

    摘要翻译: 由两个子电路形成的H桥电路,两个子电路通过负载网络彼此耦合,跨越每个子电路的相应负载节点。 两个子电路的每个子电路包括耗尽型上部晶体管,其第二电极耦合到下部晶体管的第一电极。 子电路的负载节点设置在上部晶体管的第二电极和下部晶体管的第一电极之间。 存在耦合到上部晶体管的第一电极的第一电压供应节点和第二电压供应节点耦合到下部晶体管的第二电极。 上驱动晶体管将上晶体管的栅电极选择性地耦合到上驱动电压节点,上驱动晶体管具有耦合到上开关电压电路的控制电极。 还有一个耦合到下部晶体管的栅电极的较低开关电压电源电路,并且依赖于电压的非线性电阻器耦合在上部晶体管的栅电极和第二电极之间。 在使用中,当下晶体管和上驱动晶体管处于非导通状态时,电压相关非线性电阻器两端的电位差足够小以将上晶体管控制为导通状态。 相反,当下晶体管和上驱动晶体管处于导通状态时,电压相关非线性电阻器两端的电位差向上晶体管的栅极提供负偏压,该栅极具有足以控制上晶体管的负电位 非导电状态。

    Method and apparatus for predistortion training in an amplifier utilizing predistortion
    7.
    发明授权
    Method and apparatus for predistortion training in an amplifier utilizing predistortion 失效
    使用预失真的放大器中预失真训练的方法和装置

    公开(公告)号:US07251464B2

    公开(公告)日:2007-07-31

    申请号:US10958091

    申请日:2004-10-04

    IPC分类号: H04B1/04

    CPC分类号: H03F1/3247 H03F2201/3233

    摘要: A method and apparatus for predistortion training in an amplifier using predistortion is provided herein. Predistortion takes place by collecting a series of envelope errors and averaging the envelope errors for various amplitude regions. LUT values are modified based on a curve-fit to the average amplitude values for each amplitude region. By utilizing a curve-fitting technique, the pitfalls of modifying individual LUT coefficients is avoided. Particularly, because the errors are collected in relatively broad regions and then averaged, the importance of exact correlation between a measured error and a specific LUT entry is significantly lessened.

    摘要翻译: 本文提供了一种使用预失真的放大器中预失真训练的方法和装置。 通过收集一系列包络误差并对各种幅度区域的包络误差进行平均,进行预失真。 基于与每个幅度区域的平均幅度值的曲线拟合来修改LUT值。 通过利用曲线拟合技术,可以避免修改各个LUT系数的缺陷。 特别是因为误差在相对较宽的区域中被收集,然后被平均化,所以测量误差和特定LUT条目之间的精确相关性的重要性显着降低。