MOSFET-based power supply clamps for electrostatic discharge protection
of integrated circuits
    1.
    发明授权
    MOSFET-based power supply clamps for electrostatic discharge protection of integrated circuits 失效
    基于MOSFET的电源钳位用于集成电路的静电放电保护

    公开(公告)号:US5907464A

    公开(公告)日:1999-05-25

    申请号:US823109

    申请日:1997-03-24

    IPC分类号: H01L27/02 H02H3/00

    CPC分类号: H01L27/0266

    摘要: Electrostatic discharge protection circuits adapted for use in low voltage CMOS processes have at least one PFET in the primary charge conduction path, and timer circuits configured to enable the primary conduction path during ESD events and to disable the primary conduction path during steady state conditions.In a further aspect of the present invention, bias circuits for maintaining steady state gate voltages below the dielectric breakdown level are included.In a still further aspect of the present invention a bridge circuit couples a first power supply node to a second power supply node, where the second power supply node is coupled to an ESD protection circuit.

    摘要翻译: 适用于低电压CMOS工艺的静电放电保护电路在主电荷传导路径中具有至少一个PFET,以及定时器电路,其被配置为在ESD事件期间实现初级导通路径,并且在稳态条件期间禁用初级导通路径。 在本发明的另一方面,包括用于将稳态栅极电压维持在介电击穿电平以下的偏置电路。 在本发明的另一方面,桥接电路将第一电源节点耦合到第二电源节点,其中第二电源节点耦合到ESD保护电路。

    Integrated circuit device having an embedded heat slug
    2.
    发明授权
    Integrated circuit device having an embedded heat slug 失效
    集成电路装置,具有嵌入式散热片

    公开(公告)号:US06607928B1

    公开(公告)日:2003-08-19

    申请号:US09676268

    申请日:2000-09-28

    IPC分类号: H01L2166

    摘要: An integrated circuit device having an embedded heat slug. The integrated circuit device comprises, in one embodiment, a semiconductor substrate having a frontside surface and a backside surface. The semiconductor substrate includes an integrated circuit on the frontside surface. A heat slug is disposed in an opening in the backside surface of the semiconductor substrate adjacent the integrated circuit.

    摘要翻译: 具有嵌入式散热片的集成电路装置。 在一个实施例中,集成电路器件包括具有前侧表面和后侧表面的半导体衬底。 半导体衬底包括在前侧表面上的集成电路。 散热片设置在与集成电路相邻的半导体衬底的背面中的开口中。

    VISIBLE LASER PROBING FOR CIRCUIT DEBUG AND DEFECT ANALYSIS
    3.
    发明申请
    VISIBLE LASER PROBING FOR CIRCUIT DEBUG AND DEFECT ANALYSIS 有权
    可见激光探测电路调试和缺陷分析

    公开(公告)号:US20150002182A1

    公开(公告)日:2015-01-01

    申请号:US13931869

    申请日:2013-06-29

    IPC分类号: G01R31/28

    CPC分类号: G01R31/2656

    摘要: Visible laser probing is described. In one example a probe device has a laser configured to provide a laser beam at a visible wavelength, an objective lens positioned in front of the laser to focus the laser beam on an active region of an integrated circuit through a back side of an integrated circuit die, and a detector positioned to receive a reflected laser beam reflected from the active region through a back side of the die, through the objective lens. The detector is configured to detect an amplitude modulation of the reflected laser beam wherein the amplitude modulation is attributable to the electric field at the active region.

    摘要翻译: 描述可见的激光探测。 在一个示例中,探针装置具有被配置为提供可见波长的激光束的激光器,位于激光器前面的物镜,以将激光束通过集成电路的背面聚焦在集成电路的有源区域上 并且检测器被定位成通过物镜接收从有源区域反射的反射激光束,通过该芯片的背面。 检测器被配置为检测反射激光束的幅度调制,其中幅度调制归因于有源区域处的电场。

    Semiconductor die manufacture method to limit a voltage drop on a power plane thereof by noninvasively measuring voltages on a power plane

    公开(公告)号:US06519744B2

    公开(公告)日:2003-02-11

    申请号:US09735742

    申请日:2000-12-12

    IPC分类号: G06F1750

    CPC分类号: G01R31/311

    摘要: A method is provided for manufacturing a die. A supply voltage is provided to a power plane of a selected integrated circuit, formed in and on a semiconductor substrate, having a selected design, so that a respective test current flows through a plurality of test elements, of the selected integrated circuit, each being connected to a respective test point on the power plane, the test points being spaced from one another. A magnitude of each respective test current is detected. A respective test voltage is calculated at each respective test point utilizing the respective magnitude of the respective test current flowing through the respective test element connected to a respective test point. The respective test voltages are utilized to determine at which ones of the test points the respective test voltages are more than a predetermined maximum below a supply voltage. The electric design is altered to an altered electric design if any of the test voltages are below a predetermined minimum below the supply voltage. An integrated circuit having the altered design is then manufactured on another semiconductor substrate.

    Visible laser probing for circuit debug and defect analysis

    公开(公告)号:US09651610B2

    公开(公告)日:2017-05-16

    申请号:US13931869

    申请日:2013-06-29

    IPC分类号: G01R31/28 G01R31/265

    CPC分类号: G01R31/2656

    摘要: Visible laser probing is described. In one example a probe device has a laser configured to provide a laser beam at a visible wavelength, an objective lens positioned in front of the laser to focus the laser beam on an active region of an integrated circuit through a back side of an integrated circuit die, and a detector positioned to receive a reflected laser beam reflected from the active region through a back side of the die, through the objective lens. The detector is configured to detect an amplitude modulation of the reflected laser beam wherein the amplitude modulation is attributable to the electric field at the active region.

    Integrated circuit device having an embedded heat slug
    6.
    发明授权
    Integrated circuit device having an embedded heat slug 失效
    集成电路装置,具有嵌入式散热片

    公开(公告)号:US06570247B1

    公开(公告)日:2003-05-27

    申请号:US09001704

    申请日:1997-12-30

    IPC分类号: H01L2310

    摘要: An integrated circuit device having an embedded heat slug. The integrated circuit device comprises, in one embodiment, a semiconductor substrate having a frontside surface and backside surface. The semiconductor substrate includes an integrated circuit on the frontside surface. A heat slug is disposed in an opening in the backside surface of the semiconductor substrate adjacent the integrated circuit.

    摘要翻译: 具有嵌入式散热片的集成电路装置。 在一个实施例中,集成电路器件包括具有前表面和背面的半导体衬底。 半导体衬底包括在前侧表面上的集成电路。 散热片设置在与集成电路相邻的半导体衬底的背面中的开口中。