Embedded network media access controller
    1.
    发明授权
    Embedded network media access controller 有权
    嵌入式网络媒体访问控制器

    公开(公告)号:US07934038B1

    公开(公告)日:2011-04-26

    申请号:US12180326

    申请日:2008-07-25

    IPC分类号: G06F13/14 G06F3/00 H04L12/66

    CPC分类号: G06F15/7867

    摘要: A media access system in an integrated circuit device having programmable resources for interfacing to a network. The media access system has at least one embedded media access controller configured to provide access to and from the network via a physical layer interface, programmable resources coupled to the embedded controller via a client interface, tie-off pin inputs coupled to the embedded controller for receiving a configuration vector for configuring the embedded controller without having to use a microprocessor for such configuration with the client interface being for communication between the embedded controller and the programmable resources for access to and from the network, and the embedded controller including a multi-mode interface coupled to the client interface for coupling to the programmable resources, the multi-mode interface including a plurality of Media Independent Interface modes, the multi-mode interface configured to be coupled to the physical layer interface.

    摘要翻译: 具有用于与网络接口的可编程资源的集成电路装置中的媒体接入系统。 所述媒体接入系统具有至少一个嵌入式媒体接入控制器,其被配置为经由物理层接口提供对所述网络的访问,经由客户端接口耦合到所述嵌入式控制器的可编程资源,耦合到所述嵌入式控制器的绑定引脚输入, 接收用于配置所述嵌入式控制器的配置向量,而不必对所述配置使用所述微处理器,所述客户端接口用于所述嵌入式控制器与所述可编程资源之间的通信,用于访问和来自所述网络,并且所述嵌入式控制器包括多模式 接口,耦合到客户端接口以耦合到可编程资源,多模式接口包括多个媒体独立接口模式,多模式接口被配置为耦合到物理层接口。

    Network media access controller embedded in an integrated circuit host interface
    4.
    发明授权
    Network media access controller embedded in an integrated circuit host interface 有权
    网络媒体访问控制器嵌入在集成电路主机接口中

    公开(公告)号:US07761643B1

    公开(公告)日:2010-07-20

    申请号:US12352225

    申请日:2009-01-12

    IPC分类号: G06F13/00 G06F9/26 H04L12/00

    CPC分类号: G06F15/7867

    摘要: A media access controller system embedded in an integrated circuit is described. A platform dependent bridge for communicating with a first processor, where the platform dependent bridge is associated with a platform of the first processor and where the first processor is embedded in an integrated circuit. Host interface circuitry is coupled to the platform dependent bridge and is configured to provide a processor interface, where the processor interface is for communicating with the first processor via the platform dependent bridge and where the processor interface has a platform independent bus for communication with a second processor. At least one media access controller is coupled to the host interface circuitry.

    摘要翻译: 描述嵌入在集成电路中的媒体访问控制器系统。 用于与第一处理器进行通信的平台相关桥接器,其中所述平台相关桥接器与所述第一处理器的平台相关联,并且所述第一处理器嵌入在集成电路中。 主机接口电路耦合到与平台相关的桥接器,并且被配置为提供处理器接口,其中处理器接口用于经由平台相关桥接器与第一处理器通信,并且处理器接口具有平台独立总线,用于与第二 处理器。 至少一个媒体访问控制器耦合到主机接口电路。

    Network media access controller embedded in a programmable logic device—address filter
    9.
    发明授权
    Network media access controller embedded in a programmable logic device—address filter 有权
    嵌入在可编程逻辑器件地址过滤器中的网络介质访问控制器

    公开(公告)号:US07421528B1

    公开(公告)日:2008-09-02

    申请号:US11590579

    申请日:2006-10-31

    IPC分类号: G06F13/00 G06F12/00 H04L12/54

    摘要: A method for address filtering is described. A host interface including device registers is provided. A user program is initiated for loading of data and control information respectively into a first data register and a control register of the device registers. Responsive to the loading, hardware is initiated for writing of information loaded into the first data register into a host interface register, where the first data register is associated with an address table configuration entry and the information includes read or write information and address information. Responsive to the read or write information and the address information, a multicast address is obtained from storage; a first portion of the multicast address is deposited into the first data register; and a second portion of the multicast address is deposited into a second data register.

    摘要翻译: 描述地址过滤的方法。 提供了包括设备寄存器的主机接口。 启动用户程序,将数据和控制信息分别装载到设备寄存器的第一数据寄存器和控制寄存器中。 响应于加载,开始硬件将加载到第一数据寄存器中的信息写入主机接口寄存器,其中第一数据寄存器与地址表配置条目相关联,并且该信息包括读或写信息和地址信息。 响应于读或写信息和地址信息,从存储获得多播地址; 多播地址的第一部分被存入第一数据寄存器; 多播地址的第二部分被存入第二数据寄存器。

    Network media access controller embedded in a programmable logic device-address filter
    10.
    发明授权
    Network media access controller embedded in a programmable logic device-address filter 有权
    嵌入在可编程逻辑器件地址过滤器中的网络介质访问控制器

    公开(公告)号:US07143218B1

    公开(公告)日:2006-11-28

    申请号:US11040135

    申请日:2005-01-21

    IPC分类号: G06F13/14 H04L12/28

    CPC分类号: G06F15/7867

    摘要: Method and apparatus for address filtering for a media access controller is described. An application specific integrated circuit block) located in a programmable logic device includes a media access controller. The media access controller includes an address filter, which includes: address filter modules, a first logic tree coupled to each of the address filter modules and configured to provide a frame drop signal for delineation between a dropped frame and an address filtered frame; and a second logic tree coupled to each of the address filter modules to provide an address valid signal.

    摘要翻译: 描述了用于媒体访问控制器的地址过滤的方法和装置。 位于可编程逻辑器件中的专用集成电路块包括媒体访问控制器。 媒体访问控制器包括地址过滤器,其包括:地址过滤器模块,耦合到每个地址过滤器模块的第一逻辑树,并且被配置为提供用于在丢弃的帧和地址过滤的帧之间进行描绘的帧丢弃信号; 以及耦合到每个地址过滤器模块以提供地址有效信号的第二逻辑树。