公开(公告)号：US5327522A

公开(公告)日：1994-07-05

申请号：US989781

申请日：1992-12-11

申请人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi ,  Takahiro Watanabe ,  Shuji Motomura ,  Atsuo Hashimoto ,  Sugitaka Oteki ,  Satoshi Otsuki ,  Eiki Aono ,  Takashi Kitaguchi

发明人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi ,  Takahiro Watanabe ,  Shuji Motomura ,  Atsuo Hashimoto ,  Sugitaka Oteki ,  Satoshi Otsuki ,  Eiki Aono ,  Takashi Kitaguchi

IPC分类号： G06N3/063 ,  G06F15/18

CPC分类号： G06N3/063

摘要： A neuron unit processes a plurality of input signals and for outputs an output signal which is indicative of a result of the processing, and includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a function generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part. The supplying part includes a memory for storing each weight function in the form of a binary value, and a generating circuit for generating a random pulse train based on each binary value stored in the memory. The random pulse train describes each weight function in the form of a pulse signal having a pulse density.

摘要翻译： 神经元单元处理多个输入信号并输出​​表示处理结果的输出信号，并且包括用于接收输入信号的输入线，前向处理部分，包括用于提供加权函数的提供部分和操作 使用所述加权函数之一对所述输入信号执行操作并输出所述输出信号的部分，以及包括功能生成部分的自学习部分，用于基于所述输入信号的输出信号之间的误差生成新的加权函数 前向处理部分和教学信号，以及变化部分，用于将由前向处理部分的供给部分提供的权重函数改变为由生成部分生成的新的权重函数。 供给部分包括用于以二进制值的形式存储每个加权函数的存储器，以及用于基于存储在存储器中的每个二进制值产生随机脉冲串的产生电路。 随机脉冲串以具有脉冲密度的脉冲信号的形式描述每个权重函数。

公开(公告)号：US5324991A

公开(公告)日：1994-06-28

申请号：US989605

申请日：1992-12-11

申请人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Atsuo Hashimoto ,  Sugitaka Oteki ,  Toshihiro Tsukagoshi ,  Satoshi Otsuki ,  Eiki Aono ,  Shuji Motomura ,  Takahiro Watanabe

发明人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Atsuo Hashimoto ,  Sugitaka Oteki ,  Toshihiro Tsukagoshi ,  Satoshi Otsuki ,  Eiki Aono ,  Shuji Motomura ,  Takahiro Watanabe

IPC分类号： G06N3/063 ,  G06F15/18

CPC分类号： G06N3/063

摘要： A neuron unit processes a plurality of binary input signals and outputs a neuron output signal which is indicative of a result of the processing. The neuron unit is provided with a plurality of first gates respectively for carrying out a logical operation on a binary input signal and a weighting coefficient, a second gate for carrying out a logical operation on an excitatory output signal of each of the first gates, a third gate for carrying out a logic operation on an inhibitory output signal of each of the first gates, a fourth gate for synthesizing output signals of the second and third gates and outputting the neuron output signal, and a generating circuit for generating the weighting coefficients which are supplied to each of the first gates. The generating circuit for generating one weighting coefficient includes a random number generator for generating random numbers, and a comparator for comparing each random number r with a predetermined value q and for outputting a pulse signal having first and second values depending on whether each random number r is such that r.ltoreq.q or r>q, and each weighting coefficient is described by a pulse density.

摘要翻译： 神经元单元处理多个二进制输入信号并输出​​指示处理结果的神经元输出信号。 神经元单元分别设置有多个第一门，用于对二进制输入信号和加权系数进行逻辑运算，第二门用于对每个第一门的兴奋性输出信号进行逻辑运算， 第三门，用于对每个第一门的抑制输出信号进行逻辑运算，第四门，用于合成第二和第三门的输出信号并输出​​神经元输出信号;以及产生电路，用于产生加权系数， 被提供给每个第一门。 用于产生一个加权系数的产生电路包括用于产生随机数的随机数发生器和用于将每个随机数r与预定值q进行比较的比较器，并且用于根据每个随机数r是否输出具有第一和第二值的脉冲信号 是这样的，r = q或r> q，并且每​​个加权系数由脉冲密度来描述。

公开(公告)号：US5167006A

公开(公告)日：1992-11-24

申请号：US629632

申请日：1990-12-18

申请人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

发明人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

IPC分类号： G06N3/063

CPC分类号： G06N3/063

摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.

摘要翻译： 神经元单元处理多个输入信号并输出​​指示处理结果的输出信号。 神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出 信号和自学习部分，其包括基于正向处理部分的输出信号和示教信号之间的误差产生新的加权函数的生成部分和用于改变由前向处理的供给部分提供的加权函数的变化部分 部分由生成部分生成的新的权重函数。

公开(公告)号：US5504838A

公开(公告)日：1996-04-02

申请号：US206855

申请日：1994-03-07

申请人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

发明人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

IPC分类号： G06N3/063 ,  G06F15/18

CPC分类号： G06N3/063

摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on an error signal representing an error between the output signal of the forward process part and a teaching signal and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part. The error signal includes first and second error signal components representing pulse densities.

摘要翻译： 神经元单元处理多个输入信号并输出​​指示处理结果的输出信号。 神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出 信号和自学习部分，包括用于基于表示正向处理部分的输出信号与示教信号之间的误差的误差信号产生新的加权函数的生成部分和用于改变由所述前向处理部分提供的加权函数的变化部分 将前向处理部分的一部分提供给由生成部分生成的新的加权函数。 误差信号包括表示脉冲密度的第一和第二误差信号分量。

公开(公告)号：US5619617A

公开(公告)日：1997-04-08

申请号：US128707

申请日：1993-09-30

申请人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

发明人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

IPC分类号： G06N3/063 ,  G06E1/00 ,  G06E3/00 ,  G06F15/18

CPC分类号： G06N3/063

摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.

摘要翻译： 神经元单元处理多个输入信号并输出​​指示处理结果的输出信号。 神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出 信号和自学习部分，其包括基于正向处理部分的输出信号和示教信号之间的误差产生新的加权函数的生成部分和用于改变由前向处理的供给部分提供的加权函数的变化部分 部分由生成部分生成的新的权重函数。

公开(公告)号：US5581662A

公开(公告)日：1996-12-03

申请号：US441418

申请日：1995-05-15

申请人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

发明人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

IPC分类号： G06N3/063 ,  G06F15/18

CPC分类号： G06N3/063

摘要： A hierarchical signal processing apparatus includes aggregates having logic operation portions. The apparatus compares a final output signal from a logic operation portion in a final aggregate with a teaching signal, and generates an error signal by taking a signal which exists only in the teaching signal as a positive error signal, and taking a signal which exists only in said final output signal as a negative error signal. An error signal generating portion in the apparatus generates a positive error signal of a logic operating portion within a certain aggregate which supplies one or more output signals thereof to said logic operation means of another aggregate based on one or more logic operations on the excitatory weight function signal of said weight function signal, the positive error signal, the inhibitory weight function signal of said weight function signal and the negative error signal, and also generates a negative error signal of said logic operation means within said certain aggregate which supplies one or more output signals thereof to said logic operation means of said other aggregate based on one or more logic operations on the inhibitory weight function signal of said weight function signal, the positive error signal of said other aggregate, the excitatory weight function signal of said weight function signal and the negative error signal.

摘要翻译： 分级信号处理装置包括具有逻辑运算部分的聚合。 该装置将来自最终聚合中的逻辑运算部分的最终输出信号与示教信号进行比较，并且通过仅将在教学信号中存在的信号作为正误差信号，并且仅采用仅存在的信号来产生误差信号 在所述最终输出信号中作为负误差信号。 该装置中的误差信号产生部分产生一定聚集内的逻辑运算部分的正误差信号，该积分误差信号基于对兴奋性加权函数的一个或多个逻辑运算向另一聚合体的一个或多个输出信号提供一逻辑运算装置 所述加权函数信号的信号，正误差信号，所述加权函数信号的抑制加权函数信号和负误差信号，并且还产生所述逻辑运算装置的负误差信号，所述负误差信号提供一个或多个输出 基于对所述加权函数信号的抑制加权函数信号，所述另一聚合体的正误差信号，所述加权函数信号的兴奋度权重函数信号和所述加权函数信号的抑制加权函数信号的一个或多个逻辑运算， 负误差信号。

公开(公告)号：US5333241A

公开(公告)日：1994-07-26

申请号：US889380

申请日：1992-05-28

申请人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

发明人： Toshiyuki Furuta ,  Hiroyuki Horiguchi ,  Hirotoshi Eguchi ,  Yutaka Ebi ,  Tatsuya Furukawa ,  Yoshio Watanabe ,  Toshihiro Tsukagoshi

IPC分类号： G06N3/063 ,  G06F15/18

CPC分类号： G06N3/063

摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.

摘要翻译： 神经元单元处理多个输入信号并输出​​指示处理结果的输出信号。 神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出 信号和自学习部分，其包括基于正向处理部分的输出信号和示教信号之间的误差产生新的加权函数的生成部分和用于改变由前向处理的供给部分提供的加权函数的变化部分 部分由生成部分生成的新的权重函数。

公开(公告)号：US20210060937A1

公开(公告)日：2021-03-04

申请号：US16999425

申请日：2020-08-21

申请人： Tomohiro Mizutani ,  Katsuhiro Tobita ,  Toshihiro Tsukagoshi ,  Takatsugu Maeda

发明人： Tomohiro Mizutani ,  Katsuhiro Tobita ,  Toshihiro Tsukagoshi ,  Takatsugu Maeda

IPC分类号： B41J2/045

摘要： There is provided a head driving device for causing a head to discharge droplets. The device includes a drive circuit, a first drive waveform generation circuit, a second drive waveform generation circuit, and a correction circuit. The drive circuit is configured to drive the head based on a plurality of drive waveforms to discharge the droplets. The first drive waveform generation circuit configured to generate a first drive waveform of the plurality of drive waveforms. The second drive waveform generation circuit is configured to generate a second drive waveform of the plurality of drive waveforms. The correction circuit is configured to correct the first drive waveform and the second drive waveform with reference to an intermediate potential.

公开(公告)号：US07698484B2

公开(公告)日：2010-04-13

申请号：US11523054

申请日：2006-09-19

申请人： Junichi Ikeda ,  Koji Oshikiri ,  Noriyuki Terao ,  Atsuhiro Oizumi ,  Yutaka Maita ,  Satoru Numakura ,  Hiroo Kitagawa ,  Tomonori Tanaka ,  Hiroyuki Kimbara ,  Hidetake Tanaka ,  Iwao Hamaguchi ,  Keiichi Iwasaki ,  Toshihiro Tsukagoshi ,  Naoki Tsumura

发明人： Junichi Ikeda ,  Koji Oshikiri ,  Noriyuki Terao ,  Atsuhiro Oizumi ,  Yutaka Maita ,  Satoru Numakura ,  Hiroo Kitagawa ,  Tomonori Tanaka ,  Hiroyuki Kimbara ,  Hidetake Tanaka ,  Iwao Hamaguchi ,  Keiichi Iwasaki ,  Toshihiro Tsukagoshi ,  Naoki Tsumura

IPC分类号： G06F13/00 ,  G06F3/00 ,  G06F15/173

CPC分类号： G06F9/5016 ,  G06F9/468

摘要： An information processor that is connected to at least one other information processor via a network, includes a detecting unit that detects an optional device to be used for information processing, as a target optional device, installed on the other information processor, an issuing unit that issues an access request to use the target optional device to the other information processor, a receiving unit that receives an access permission for access to the target optional device from the other information processor, and a processing unit that performs the information processing with the target optional device.

摘要翻译： 经由网络连接至少一个其它信息处理器的信息处理器包括：检测单元，其检测用于信息处理的可选设备，作为安装在另一个信息处理器上的目标可选设备;发布单元， 向另一个信息处理器发出使用目标可选设备的访问请求;接收单元，其从其他信息处理器接收对目标可选设备的访问许可;以及处理单元，其执行与目标可选的信息处理 设备。

公开(公告)号：US20070211746A1

公开(公告)日：2007-09-13

申请号：US11684229

申请日：2007-03-09

申请人： Koji OSHIKIRI ,  Noriyuki Terao ,  Junichi Ikeda ,  Atsuhiro Oizumi ,  Satoru Numakura ,  Yutaka Maita ,  Tomonori Tanaka ,  Hiroyuki Kimbara ,  Keiichi Iwasaki ,  Toshihiro Tsukagoshi ,  Iwao Hamaguchi ,  Hidetake Tanaka ,  Naoki Tsumura ,  Hiroo Kitagawa

发明人： Koji OSHIKIRI ,  Noriyuki Terao ,  Junichi Ikeda ,  Atsuhiro Oizumi ,  Satoru Numakura ,  Yutaka Maita ,  Tomonori Tanaka ,  Hiroyuki Kimbara ,  Keiichi Iwasaki ,  Toshihiro Tsukagoshi ,  Iwao Hamaguchi ,  Hidetake Tanaka ,  Naoki Tsumura ,  Hiroo Kitagawa

IPC分类号： H04J3/16

CPC分类号： G06F13/4022 ,  G06F2213/0026

摘要： A high-speed serial switch fabric is configured to perform a mapping of a traffic class that is capable of differentiating traffics onto a virtual channel. The high-speed serial switch fabric connects a plurality of devices. A traffic-class setting unit sets, when a conflict occurs between devices connected to the high-speed serial switch fabric, the traffic class for each of traffics in the devices having the conflict. A channel setting unit assigns each of set traffic classes to different virtual channels, and gives a priority of data communication to each of the set traffic classes.

摘要翻译： 高速串行交换结构被配置为执行能够将业务区分到虚拟信道上的业务类别的映射。 高速串行交换矩阵连接多个设备。 当与连接到高速串行交换机结构的设备之间发生冲突时，流量级设置单元设置具有冲突的设备中的每个业务的业务等级。 信道设置单元将每个设置的业务类别分配给不同的虚拟信道，并且给予每个设置业务类别的数据通信的优先级。