摘要:
Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA.
摘要:
Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA.
摘要:
Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA.
摘要:
Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA.
摘要:
Dual conversion gain pixel methods, system, and apparatus are disclosed. Dual conversion gain may be obtained by configuring an active pixel having a storage node, a first connection region, a second connection region, and a capacitor coupled between the storage node and the second connection region to introduce a first conversion gain by connecting the first connection region to a power source and connecting the second connection region to a current bias source and reconfiguring the active pixel to introduce a second conversion gain by connecting the second connection region to the power source and connecting the first connection region to the current bias source.
摘要:
Embodiments of circuits and methods for suppressing row-wise noise in the analog domain in an image sensing device. In one embodiment, a pixel sampling circuit includes a readout circuit that is connected to a plurality of pixels to receive analog signals from the pixels. The pixel sampling circuit also includes a noise correction circuit that provides a reference signal to remove at least a portion of the noise in the analog signals received from the pixels before the analog signals are converted into digital signals.
摘要:
An imager architecture that utilizes column sampling circuitry that can support pixel-wise automatic gain selection (AGS). The column sampling circuitry samples the pixel output signals directly (e.g., with unity gain) or after amplification in a column level amplifier while supporting correlated double sampling (CDS) in both situations.
摘要:
A ferroelectric memory comprises a plurality of memory cells and circuitry to sense data thereof. Power supply decoupling circuitry may decouple supplies of the memory device during a portion of reading data. Additionally, ferroelectric domains of the memory cells may receive a series of polarization reversals to improve domain alignment and malleability. To drive reference cells of the memory with such polarization reversals, a multiplexer may be configured to swap a data bitline with a reference bitline so that reference cells may be accessed as regular data cells. While reading a ferroelectric memory, a self-timer circuit may monitor characteristics of the ferroelectric material and adjust an integration duration for a sense amplifier based on the monitored characteristics. A sampling-comparator may sample a signal related to the ferroelectric material at one instant, which may then be used subsequently thereafter by the self-timer circuit to influence an integration duration of the sense amplifier.
摘要:
A ferroelectric memory comprises a plurality of memory cells and circuitry to sense data thereof. Power supply decoupling circuitry may decouple supplies of the memory device during a portion of reading data. Additionally, ferroelectric domains of the memory cells may receive a series of polarization reversals to improve domain alignment and malleability. To drive reference cells of the memory with such polarization reversals, a multiplexer may be configured to swap a data bitline with a reference bitline so that reference cells may be accessed as regular data cells. While reading a ferroelectric memory, a self-timer circuit may monitor characteristics of the ferroelectric material and adjust an integration duration for a sense amplifier based on the monitored characteristics. A sampling-comparator may sample a signal related to the ferroelectric material at one instant, which may then be used subsequently thereafter by the self-timer circuit to influence an integration duration of the sense amplifier.
摘要:
Electronic devices may be provided with image sensors. Image sensors may be configured to capture images during imaging operations and monitor ambient light levels during non-imaging operations. An image sensor may include image pixels that receive light and dark pixels that are prevented from receiving light. An image sensor may include an ambient light detection circuit. The ambient light detection circuit may include an oscillator, timing and control circuitry, and a counter. The oscillator may be switchably coupled to the image pixels and the dark pixels. The counter may be configured to count up oscillator cycles of the oscillator while the oscillator is coupled to the image pixels and to count down oscillator cycles of the oscillator while the oscillator is coupled to the dark pixels. The counter may provide a count value that depends on a signal from the image pixels and a signal from the dark pixels.