公开(公告)号：US08085174B2

公开(公告)日：2011-12-27

申请号：US12801291

申请日：2010-06-02

申请人： Tsung-Heng Tsai ,  Jen-Hung Chi

发明人： Tsung-Heng Tsai ,  Jen-Hung Chi

IPC分类号： H03M1/06

CPC分类号： H03M1/06 ,  H03M1/66

摘要： A current-mode DAC includes at least one to-be-corrected one current source, a referential current source, a current comparator for comparing the current of the to-be-corrected current source and the current of the referential current source, a correction controller, a successive approximation register controller controlled by the correction controller and referring to the result of the comparison for carrying out successive approximation, and at least one correction DAC electrically connected with the successive approximation register controller and the to-be-corrected current source for referring to the result acquired from the successive approximation register controller and then providing a bias for the to-be-corrected current source for carrying out current correction. Accordingly, the corrected current can have the excellent accuracy.

公开(公告)号：US20110187568A1

公开(公告)日：2011-08-04

申请号：US12801291

申请日：2010-06-02

申请人： Tsung-Heng Tsai ,  Jen-Hung Chi

发明人： Tsung-Heng Tsai ,  Jen-Hung Chi

IPC分类号： H03M1/06 ,  H03M1/66

CPC分类号： H03M1/06 ,  H03M1/66

摘要： A current-mode DAC includes at least one to-be-corrected one current source, a referential current source, a current comparator for comparing the current of the to-be-corrected current source and the current of the referential current source, a correction controller, a successive approximation register controller controlled by the correction controller and referring to the result of the comparison for carrying out successive approximation, and at least one correction DAC electrically connected with the successive approximation register controller and the to-be-corrected current source for referring to the result acquired from the successive approximation register controller and then providing a bias for the to-be-corrected current source for carrying out current correction. Accordingly, the corrected current can have the excellent accuracy.

摘要翻译： 电流模式DAC包括至少一个待校正的一个电流源，参考电流源，用于比较待校正电流源的电流和参考电流源的电流的电流比较器，校正 控制器，由校正控制器控制并参考用于执行逐次逼近的比较结果的逐次逼近寄存器控制器以及与逐次逼近寄存器控制器和待校正电流源电连接的至少一个校正DAC， 参考从逐次逼近寄存器控制器获取的结果，然后为待校正的电流源提供用于执行电流校正的偏置。 因此，校正电流可以具有优异的精度。

公开(公告)号：US08604954B2

公开(公告)日：2013-12-10

申请号：US13596744

申请日：2012-08-28

申请人： Chun-Jen Chen ,  Tsung-Heng Tsai ,  Tzu-Yi Tang

发明人： Chun-Jen Chen ,  Tsung-Heng Tsai ,  Tzu-Yi Tang

IPC分类号： H03M1/10

CPC分类号： H03M1/1009 ,  H03M1/1215

摘要： A timing calibration circuit for a time-interleaved analog-to-digital converter (ADC) is provided. The timing calibration circuit includes a correlation unit, an adaptive filter and a delay cell. The correlation unit generates a first correlation coefficient according to a first zero-crossing possibility distribution between a first digital data and a second digital data, and generates a second correlation coefficient according to a second zero-crossing possibility distribution between the second digital data and a third digital data. The adaptive filter generates a predicted time skew according to a difference between the first correlation coefficient and the second correlation coefficient. The delay cell calibrates a clock signal of the ADC according to the predicted time skew.

摘要翻译： 提供了一种用于时间交织的模数转换器（ADC）的定时校准电路。 定时校准电路包括相关单元，自适应滤波器和延迟单元。 相关单元根据第一数字数据和第二数字数据之间的第一过零可能性分布产生第一相关系数，并且根据第二数字数据和第二数字数据之间的第二过零可能性分布产生第二相关系数 第三个数字数据。 自适应滤波器根据第一相关系数和第二相关系数之间的差产生预测的时间偏差。 延迟单元根据预测的时间偏差校准ADC的时钟信号。

公开(公告)号：US08624768B2

公开(公告)日：2014-01-07

申请号：US13566655

申请日：2012-08-03

申请人： Tsung-Heng Tsai ,  Pei-Jung Hsu ,  Bo-Yu Shiu

发明人： Tsung-Heng Tsai ,  Pei-Jung Hsu ,  Bo-Yu Shiu

IPC分类号： H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/0682 ,  H03M1/164

摘要： A zero-crossing-based analog-to-digital converter having current mismatch correction capability, that can raise resolution, energy efficiency, and sampling rate of a fully differential zero-crossing circuit, is realized through a 90 nm CMOS technology. The circuit is used mainly to correct offset error, to use a current supply separation technology and a digital correction mechanism to correct mismatch among a plurality of current supplies.

摘要翻译： 通过90nm CMOS技术实现了具有电流失配校正能力的基于零交叉的模数转换器，其可以提高全差分过零电路的分辨率，能量效率和采样率。 该电路主要用于校正偏移误差，使用电流分配技术和数字校正机构来校正多个电流源之间的不匹配。

公开(公告)号：US20130241755A1

公开(公告)日：2013-09-19

申请号：US13596744

申请日：2012-08-28

申请人： Chun-Jen Chen ,  Tsung-Heng Tsai ,  Tzu-Yi Tang

发明人： Chun-Jen Chen ,  Tsung-Heng Tsai ,  Tzu-Yi Tang

IPC分类号： H03M1/10

CPC分类号： H03M1/1009 ,  H03M1/1215

摘要： A timing calibration circuit for a time-interleaved analog-to-digital converter (ADC) is provided. The timing calibration circuit includes a correlation unit, an adaptive filter and a delay cell. The correlation unit generates a first correlation coefficient according to a first zero-crossing possibility distribution between a first digital data and a second digital data, and generates a second correlation coefficient according to a second zero-crossing possibility distribution between the second digital data and a third digital data. The adaptive filter generates a predicted time skew according to a difference between the first correlation coefficient and the second correlation coefficient. The delay cell calibrates a clock signal of the ADC according to the predicted time skew.

摘要翻译： 提供了一种用于时间交织的模数转换器（ADC）的定时校准电路。 定时校准电路包括相关单元，自适应滤波器和延迟单元。 相关单元根据第一数字数据和第二数字数据之间的第一过零可能性分布产生第一相关系数，并且根据第二数字数据和第二数字数据之间的第二过零可能性分布产生第二相关系数 第三个数字数据。 自适应滤波器根据第一相关系数和第二相关系数之间的差产生预测的时间偏差。 延迟单元根据预测的时间偏差来校准ADC的时钟信号。