公开(公告)号：US20230163184A1

公开(公告)日：2023-05-25

申请号：US17752888

申请日：2022-05-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Su Xing ,  Purakh Raj Verma ,  Rudy Octavius Sihombing ,  Shyam Parthasarathy ,  JINYU LIAO

IPC: H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L21/8234

CPC classification number: H01L29/4238 ,  H01L29/41758 ,  H01L29/0653 ,  H01L21/823418 ,  H01L21/823481

Abstract: A multi-finger transistor structure is provided in the present invention, including multiple active areas, a gate structure consisting of multiple gate parts and connecting parts, wherein each gate part crosses over one of the active areas and each connecting part alternatively connects one end and the other end of the gate parts so as to form a meander gate structure, and multiple sources and drains, wherein one source and one drain are set between two adjacent gate parts, and each gate parts is accompanied by one source and one drain at two sides respectively, and the distance between the drain and the gate part is larger than the distance between the source and the gate part, so that the source and the drain are asymmetric with respect to the corresponding gate part, and air gaps are formed in the dielectric layer between each drain and the corresponding gate part.

公开(公告)号：US20210348684A1

公开(公告)日：2021-11-11

申请号：US16889816

申请日：2020-06-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： HAI BIAO YAO ,  Su Xing ,  JINYU LIAO ,  Purakh Raj Verma

IPC: F16J15/06 ,  H05K1/02 ,  H05K1/18 ,  H05K9/00

Abstract: The invention provides a seal ring structure, which comprises a substrate, and a seal ring positioned on the substrate, wherein the seal ring comprises an inner seal ring comprising a plurality of inner seal units, wherein each of the inner seal units is arranged at intervals with each other, an outer seal ring comprising a plurality of outer seal units arranged at the periphery of the inner seal ring, wherein each of the outer seal units is arranged at intervals with each other, and a plurality of groups of fence-shaped seal units, wherein at least one group of fence-shaped seal units is positioned between one of the inner seal units and the other adjacent outer seal unit.

公开(公告)号：US20240063282A1

公开(公告)日：2024-02-22

申请号：US17950066

申请日：2022-09-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Purakh Raj Verma ,  Su Xing ,  JINYU LIAO

IPC: H01L29/423 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/42384 ,  H01L29/78618 ,  H01L27/1207 ,  H03F2200/294 ,  H03F3/16

Abstract: A semiconductor device includes a substrate having an active area, a first gate line extending along a first direction on the active area, a first gate line extension adjacent to the first gate line and outside the active area, a second gate line extending along the first direction on the active area and adjacent to the first gate line, and a second gate line extension adjacent to the second gate line and outside the active area. Preferably, the active area includes a first indentation and a second indentation, in which the first gate line extension overlaps the first indentation and the second gate line extension overlaps the first indentation.