公开(公告)号：US10062705B1

公开(公告)日：2018-08-28

申请号：US15487404

申请日：2017-04-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei Xu ,  JiZhou Han ,  Wang Xiang

IPC: H01L27/11568 ,  H01L27/11573 ,  H01L21/02 ,  H01L29/51 ,  H01L29/792 ,  H01L29/66

CPC classification number: H01L21/02164 ,  H01L27/11573 ,  H01L29/40117 ,  H01L29/42344 ,  H01L29/66833 ,  H01L29/792

Abstract: A method of manufacturing a flash memory includes providing a substrate, a memory gate on the substrate, a hard mask on the memory gate, a spacer on a sidewall of the memory gate, and a select gate disposed on a sidewall of the spacer. A first silicon oxide layer is formed to conformally cover the memory gate, the hard mask, the spacer, and the select gate. A thickness of the first silicon oxide layer is smaller than 0.54 of a thickness of the hard mask. Later, the first silicon oxide layer is thinned by a dry etching process. After that, the first silicon oxide layer and the hard mask are entirely removed by a wet etching process.