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1.发明授权Method for fabricating semiconductor device including a patterned multi-layered dielectric film with an exposed edge 有权一种制造半导体器件的方法，包括具有暴露边缘的图案化多层电介质膜公开(公告)号：US09412851B2
公开(公告)日：2016-08-09
申请号：US14138153
申请日：2013-12-23
发明人： Yu-Chun Chang , Ping-Chia Shih , Chi-Cheng Huang , Kuo-Lung Li , Kun-I Chou , Chung-Che Huang , Chia-Cheng Hsu , Mu-Jia Liu
IPC分类号： H01L21/3205 , H01L21/4763 , H01L29/66 , H01L27/115
CPC分类号： H01L29/66833 , H01L27/1157 , H01L27/11573
摘要： A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region.
摘要翻译： 一种制造半导体器件的方法包括在衬底上形成图案化的多层电介质膜; 在图案化的多层电介质膜上形成图案化的叠层，使得图案化的多层电介质膜的边缘从图案化的叠层露出; 形成覆盖层以覆盖基板的一部分并暴露图案化的叠层和图案化多层电介质膜的暴露边缘; 通过使用覆盖层和图案化叠层作为蚀刻掩模去除图案化的多层电介质膜的暴露边缘的至少一部分; 以及通过使用覆盖层作为蚀刻掩模进行离子注入工艺以形成掺杂区域。
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公开(公告)号：US20150179748A1
公开(公告)日：2015-06-25
申请号：US14138153
申请日：2013-12-23
发明人： Yu-Chun Chang , Ping-Chia Shih , Chi-Cheng Huang , Kuo-Lung Li , Kun-I Chou , Chung-Che Huang , Chia-Cheng Hsu , Mu-Jia Liu
IPC分类号： H01L29/423 , H01L29/66
CPC分类号： H01L29/66833 , H01L27/1157 , H01L27/11573
摘要： A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region.
摘要翻译： 一种制造半导体器件的方法包括在衬底上形成图案化的多层电介质膜; 在图案化的多层电介质膜上形成图案化的叠层，使得图案化的多层电介质膜的边缘从图案化的叠层露出; 形成覆盖层以覆盖基板的一部分并暴露图案化的叠层和图案化多层电介质膜的暴露边缘; 通过使用覆盖层和图案化叠层作为蚀刻掩模去除图案化的多层电介质膜的暴露边缘的至少一部分; 以及通过使用覆盖层作为蚀刻掩模进行离子注入工艺以形成掺杂区域。
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