公开(公告)号：US20160336269A1

公开(公告)日：2016-11-17

申请号：US14709500

申请日：2015-05-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kun-Ju Li ,  Shu Min Huang ,  Kuo-Chin Hung ,  Po-Cheng Huang ,  Yu-Ting Li ,  Pei-Yu Lee ,  Min-Chuan Tsai ,  Chih-Hsun Lin ,  Wu-Sian Sie ,  Jen-Chieh Lin

IPC: H01L23/535 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/7684 ,  H01L21/28088 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76874 ,  H01L23/485 ,  H01L23/53266 ,  H01L29/66545 ,  H01L29/7833

Abstract: A semiconductor process includes the following steps. A dielectric layer having a recess is formed on a substrate. A barrier layer is formed to cover the recess, thereby the barrier layer having two sidewall parts. A conductive layer is formed on the barrier layer by an atomic layer deposition process, thereby the conductive layer having two sidewall parts. The two sidewall parts of the conductive layer are pulled down. A conductive material fills the recess and has a part contacting the two sidewall parts of the barrier layer protruding from the two sidewall parts of the conductive layer, wherein the equilibrium potential difference between the barrier layer and the conductive layer is different from the equilibrium potential difference between the barrier layer and the conductive material. Moreover, the present invention also provides a semiconductor structure formed by said semiconductor process.

Abstract translation: 半导体工艺包括以下步骤。 在基板上形成具有凹部的电介质层。 形成阻挡层以覆盖凹部，由此阻挡层具有两个侧壁部分。 通过原子层沉积工艺在阻挡层上形成导电层，由此导电层具有两个侧壁部分。 导电层的两个侧壁部分被拉下。 导电材料填充凹部，并且具有接触从导电层的两个侧壁部分突出的阻挡层的两个侧壁部分的部分，其中阻挡层和导电层之间的平衡电位差不同于平衡电位差 在阻挡层和导电材料之间。 此外，本发明还提供了由所述半导体工艺形成的半导体结构。