公开(公告)号：US20230018710A1

公开(公告)日：2023-01-19

申请号：US17386554

申请日：2021-07-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Ren Huang ,  Chen-Hsiao Wang ,  Kai-Kuang Ho

IPC: H01L21/78 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/66

Abstract: A wafer with a test structure includes a wafer with a front side and a back side. A first die, a second die, a third die and a scribe line are disposed on the wafer. The scribe line is positioned between the dice. The first die includes a first dielectric layer and a first metal connection disposed within and on the first dielectric layer. A test structure and a dielectric layer are disposed on the scribe line, wherein the test structure is on the dielectric layer. Two first trenches are respectively disposed between the first dielectric layer and the dielectric layer and disposed at one side of the dielectric layer. Two second trenches penetrate the wafer, and each of the two second trenches respectively connects to a corresponding one of the two first trenches. A grinding tape covers the front side of the wafer and contacts the test structure.

公开(公告)号：US20240170332A1

公开(公告)日：2024-05-23

申请号：US18420779

申请日：2024-01-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Ren Huang ,  Chen-Hsiao Wang ,  Kai-Kuang Ho

IPC: H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L21/66

CPC classification number: H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31144 ,  H01L22/32

Abstract: A wafer with a test structure includes a wafer with a front side and a back side. A first die, a second die, a third die and a scribe line are disposed on the wafer. The scribe line is positioned between the dice. The first die includes a first dielectric layer and a first metal connection disposed within and on the first dielectric layer. A test structure and a dielectric layer are disposed on the scribe line, wherein the test structure is on the dielectric layer. Two first trenches are respectively disposed between the first dielectric layer and the dielectric layer and disposed at one side of the dielectric layer. Two second trenches penetrate the wafer, and each of the two second trenches respectively connects to a corresponding one of the two first trenches. A grinding tape covers the front side of the wafer and contacts the test structure.