公开(公告)号：US20240128214A1

公开(公告)日：2024-04-18

申请号：US18398204

申请日：2023-12-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Aaron Chen ,  Chi Ren ,  Yi Hsin Liu

IPC: H01L23/00 ,  H01L23/522

CPC classification number: H01L24/05 ,  H01L23/5226 ,  H01L24/03 ,  H01L23/53228 ,  H01L2224/0391 ,  H01L2924/1438 ,  H01L2924/14511

Abstract: An integrated circuit structure includes an aluminum pad layer on a dielectric stack, a passivation layer covering the aluminum pad layer, and an aluminum shield layer including aluminum routing patterns disposed directly above an embedded memory area and embedded in the dielectric stack. The aluminum shield layer is electrically connected to the uppermost copper layer through a plurality of tungsten vias. The plurality of tungsten vias is embedded in the dielectric stack.

公开(公告)号：US12283557B2

公开(公告)日：2025-04-22

申请号：US18398204

申请日：2023-12-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Aaron Chen ,  Chi Ren ,  Yi Hsin Liu

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/522 ,  H01L23/532

Abstract: An integrated circuit structure includes an aluminum pad layer on a dielectric stack, a passivation layer covering the aluminum pad layer, and an aluminum shield layer including aluminum routing patterns disposed directly above an embedded memory area and embedded in the dielectric stack. The aluminum shield layer is electrically connected to the uppermost copper layer through a plurality of tungsten vias. The plurality of tungsten vias is embedded in the dielectric stack.

公开(公告)号：US11901318B2

公开(公告)日：2024-02-13

申请号：US17160400

申请日：2021-01-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Aaron Chen ,  Chi Ren ,  Yi Hsin Liu

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L24/05 ,  H01L23/5226 ,  H01L24/03 ,  H01L23/53228 ,  H01L23/53257 ,  H01L2224/024 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/02313 ,  H01L2224/02372 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0391 ,  H01L2224/05546 ,  H01L2224/05624 ,  H01L2924/1438 ,  H01L2924/14511

Abstract: An integrated circuit structure includes a substrate with a circuit region thereon and a copper interconnect structure disposed on the substrate. The copper interconnect structure includes an uppermost copper layer covered by a dielectric layer. An aluminum pad layer is provided on the dielectric layer. A metal layer is provided on the circuit region and is located between the uppermost copper layer and the aluminum pad layer.