公开(公告)号：US11664450B2

公开(公告)日：2023-05-30

申请号：US17216642

申请日：2021-03-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ling-Chun Chou ,  Te-Chi Yen ,  Yu-Hung Chang ,  Kun-Hsien Lee ,  Kai-Lin Lee

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L29/7835 ,  H01L29/0653 ,  H01L29/086 ,  H01L29/0878

Abstract: A high voltage semiconductor device includes a semiconductor substrate, first and second deep well regions, and first and second well regions disposed in the semiconductor substrate. The second deep well region is located above the first deep well region. The first well region is located above the first deep well region. The second well region is located above the second deep well region. A conductivity type of the second deep well region is complementary to that of the first deep well region. A conductivity type of the second well region is complementary to that of the first well region and the second deep well region. A length of the second deep well region is greater than or equal to that of the second well region and less than that of the first deep well region. The first well region is connected with the first deep well region.

公开(公告)号：US20220271161A1

公开(公告)日：2022-08-25

申请号：US17216642

申请日：2021-03-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ling-Chun Chou ,  Te-Chi Yen ,  Yu-Hung Chang ,  Kun-Hsien Lee ,  Kai-Lin Lee

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08

Abstract: A high voltage semiconductor device includes a semiconductor substrate, first and second deep well regions, and first and second well regions disposed in the semiconductor substrate. The second deep well region is located above the first deep well region. The first well region is located above the first deep well region. The second well region is located above the second deep well region. A conductivity type of the second deep well region is complementary to that of the first deep well region. A conductivity type of the second well region is complementary to that of the first well region and the second deep well region. A length of the second deep well region is greater than or equal to that of the second well region and less than that of the first deep well region. The first well region is connected with the first deep well region.

公开(公告)号：US20240105839A1

公开(公告)日：2024-03-28

申请号：US18528816

申请日：2023-12-05

Applicant: UNITED MICROELECTRONICS CORP

Inventor： Ling-Chun Chou ,  Yu-Hung Chang ,  Kun-Hsien Lee

IPC: H01L29/78 ,  H01L29/06

CPC classification number: H01L29/7823 ,  H01L29/0623

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

公开(公告)号：US11881527B2

公开(公告)日：2024-01-23

申请号：US17472680

申请日：2021-09-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ling-Chun Chou ,  Yu-Hung Chang ,  Kun-Hsien Lee

IPC: H01L29/78 ,  H01L29/06

CPC classification number: H01L29/7823 ,  H01L29/0623

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

公开(公告)号：US20230253497A1

公开(公告)日：2023-08-10

申请号：US18135198

申请日：2023-04-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ling-Chun Chou ,  Te-Chi Yen ,  Yu-Hung Chang ,  Kun-Hsien Lee ,  Kai-Lin Lee

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/06

CPC classification number: H01L29/7835 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/0653

Abstract: A high voltage semiconductor device includes a semiconductor substrate, first and second deep well regions, and first and second well regions disposed in the semiconductor substrate. The second deep well region is located above the first deep well region. The first well region is located above the first deep well region. The second well region is located above the second deep well region. A conductivity type of the second deep well region is complementary to that of the first deep well region. A conductivity type of the second well region is complementary to that of the first well region and the second deep well region. A length of the second deep well region is greater than or equal to that of the second well region and less than that of the first deep well region. The first well region is connected with the first deep well region.

公开(公告)号：US20230052714A1

公开(公告)日：2023-02-16

申请号：US17472680

申请日：2021-09-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ling-Chun Chou ,  Yu-Hung Chang ,  Kun-Hsien Lee

IPC: H01L29/78 ,  H01L29/06

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

公开(公告)号：US20240120419A1

公开(公告)日：2024-04-11

申请号：US18528806

申请日：2023-12-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ling-Chun Chou ,  Yu-Hung Chang ,  Kun-Hsien Lee

IPC: H01L29/78 ,  H01L29/06

CPC classification number: H01L29/7823 ,  H01L29/0623

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.