公开(公告)号：US10885981B2

公开(公告)日：2021-01-05

申请号：US16254611

申请日：2019-01-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zih-Yu Chiu ,  Hsin-Wen Chen ,  Yen-Yao Wang

IPC: G11C15/04

Abstract: A cell of a content-addressable memory (CAM) has a first switch, a second switch and a storage unit. A first end of the first switch and a first end of the second switch are coupled to a matchline. The first switch is controlled by a first search signal, and the second switch is controlled by a second search signal. The second search signal is complementary to the first search signal. The storage unit has a first inverter and a second inverter. The first inverter has a first latch node coupled to a second end of the first switch. The second inverter is cross-coupled to the first inverter and has a second latch node coupled to a second end of the second switch.

公开(公告)号：US10777260B1

公开(公告)日：2020-09-15

申请号：US16655220

申请日：2019-10-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zih-Yu Chiu ,  Hsin-Wen Chen ,  Ya-Nan Mou ,  Yuan-Hui Chen ,  Chung-Cheng Tsai

IPC: G11C11/00 ,  G11C11/412 ,  G11C11/419 ,  H01L27/11

Abstract: An SRAM cell includes two inverters and three transistors. The first inverter includes a first end coupled to a first storage node and a second end coupled to a second storage node. The second inverter includes a first end coupled to the second storage node and a second end coupled to the first storage node. The first transistor includes a first end coupled to the first storage node, a second end and a control end. The second transistor includes a first end coupled to the second end of the first transistor, a second end coupled to a first bit line, and a control end. The third transistor includes a first end coupled between the second end of the first transistor and the first end of the second transistor, a second end, and a control end coupled to the first storage node.

公开(公告)号：US20200234765A1

公开(公告)日：2020-07-23

申请号：US16254611

申请日：2019-01-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zih-Yu Chiu ,  Hsin-Wen Chen ,  Yen-Yao Wang

IPC: G11C15/04

Abstract: A cell of a content-addressable memory (CAM) has a first switch, a second switch and a storage unit. A first end of the first switch and a first end of the second switch are coupled to a matchline. The first switch is controlled by a first search signal, and the second switch is controlled by a second search signal. The second search signal is complementary to the first search signal. The storage unit has a first inverter and a second inverter. The first inverter has a first latch node coupled to a second end of the first switch. The second inverter is cross-coupled to the first inverter and has a second latch node coupled to a second end of the second switch.