FIN FIELD-EFFECT TRANSISTOR STRUCTURE
    1.
    发明申请
    FIN FIELD-EFFECT TRANSISTOR STRUCTURE 有权
    FIN场效应晶体管结构

    公开(公告)号:US20130087810A1

    公开(公告)日:2013-04-11

    申请号:US13689720

    申请日:2012-11-29

    CPC classification number: H01L29/78 H01L29/66545 H01L29/66795 H01L29/7833

    Abstract: A fin field-effect transistor structure comprises a substrate, a fin channel, a source/drain region, a high-k metal gate and a plurality of slot contact structures. The fin channel is formed on the substrate. The source/drain region is formed in the fin channel. The high-k metal gate formed on the substrate and the fin channel comprises a high-k dielectric layer and a metal gate layer, wherein the high-k dielectric layer is arranged between the metal gate layer and the fin channel. The slot contact structures are disposed at both sides of the metal gate.

    Abstract translation: 鳍状场效应晶体管结构包括衬底,鳍状沟道,源极/漏极区域,高k金属栅极和多个狭槽接触结构。 翅片通道形成在基板上。 源极/漏极区域形成在鳍状沟道中。 形成在基板和鳍状沟道上的高k金属栅包括高k电介质层和金属栅极层,其中高k电介质层布置在金属栅极层和鳍状沟之间。 槽接触结构设置在金属门的两侧。

    FIN FIELD-EFFECT TRANSISTOR STRUCTURE AND MANUFACTURING PROCESS THEREOF
    2.
    发明申请
    FIN FIELD-EFFECT TRANSISTOR STRUCTURE AND MANUFACTURING PROCESS THEREOF 有权
    FIN场效应晶体管结构及其制造工艺

    公开(公告)号:US20130089957A1

    公开(公告)日:2013-04-11

    申请号:US13693009

    申请日:2012-12-03

    CPC classification number: H01L29/78 H01L29/66545 H01L29/66795 H01L29/7833

    Abstract: A fin field-effect transistor structure includes a substrate, a fin channel and a high-k metal gate. The high-k metal gate is formed on the substrate and the fin channel. A process of manufacturing the fin field-effect transistor structure includes the following steps. Firstly, a polysilicon pseudo gate structure is formed on the substrate and a surface of the fin channel. By using the polysilicon pseudo gate structure as a mask, a source/drain region is formed in the fin channel. After the polysilicon pseudo gate structure is removed, a high-k dielectric layer and a metal gate layer are successively formed. Afterwards, a planarization process is performed on the substrate having the metal gate layer until the first dielectric layer is exposed, so that a high-k metal gate is produced.

    Abstract translation: 鳍状场效应晶体管结构包括衬底,鳍状沟道和高k金属栅极。 高k金属栅极形成在基板和鳍状通道上。 制造鳍式场效应晶体管结构的工艺包括以下步骤。 首先,在基板和散热片通道的表面上形成多晶硅伪栅极结构。 通过使用多晶硅伪栅极结构作为掩模,在鳍式沟道中形成源/漏区。 在去除多晶硅伪栅极结构之后,依次形成高k电介质层和金属栅极层。 然后,在具有金属栅极层的基板上进行平坦化处理,直到第一介电层露出为止,从而产生高k金属栅极。

    SEMICONDUCTOR DEVICE WITH STRESS-PROVIDING STRUCTURE
    3.
    发明申请
    SEMICONDUCTOR DEVICE WITH STRESS-PROVIDING STRUCTURE 审中-公开
    具有应力结构的半导体器件

    公开(公告)号:US20130264585A1

    公开(公告)日:2013-10-10

    申请号:US13907980

    申请日:2013-06-03

    CPC classification number: H01L29/7842 H01L21/3247 H01L29/66636 H01L29/7848

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a recess and a stress-providing structure. A channel structure is formed in the substrate. The recess is formed in the substrate and arranged beside the channel structure. The recess has a round inner surface. The stress-providing structure is formed within the recess. Corresponding to the profile of the round inner surface of the recess, the stress-providing structure has a round outer surface.

    Abstract translation: 提供半导体器件。 半导体器件包括衬底,凹部和应力提供结构。 在衬底中形成沟道结构。 凹槽形成在衬底中并且布置在通道结构旁边。 凹槽具有圆形的内表面。 应力提供结构形成在凹部内。 对应于凹部的圆形内表面的轮廓,应力提供结构具有圆形外表面。

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