公开(公告)号：US20130087810A1

公开(公告)日：2013-04-11

申请号：US13689720

申请日：2012-11-29

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Teng-Chun TSAI ,  Chun-Yuan WU ,  Chin-Fu LIN ,  Chih-Chien LIU ,  Chin-Cheng CHIEN

IPC: H01L29/78

CPC classification number: H01L29/78 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7833

Abstract: A fin field-effect transistor structure comprises a substrate, a fin channel, a source/drain region, a high-k metal gate and a plurality of slot contact structures. The fin channel is formed on the substrate. The source/drain region is formed in the fin channel. The high-k metal gate formed on the substrate and the fin channel comprises a high-k dielectric layer and a metal gate layer, wherein the high-k dielectric layer is arranged between the metal gate layer and the fin channel. The slot contact structures are disposed at both sides of the metal gate.

Abstract translation: 鳍状场效应晶体管结构包括衬底，鳍状沟道，源极/漏极区域，高k金属栅极和多个狭槽接触结构。 翅片通道形成在基板上。 源极/漏极区域形成在鳍状沟道中。 形成在基板和鳍状沟道上的高k金属栅包括高k电介质层和金属栅极层，其中高k电介质层布置在金属栅极层和鳍状沟之间。 槽接触结构设置在金属门的两侧。

公开(公告)号：US20150311284A1

公开(公告)日：2015-10-29

申请号：US14792638

申请日：2015-07-07

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Hung-Lin SHIH ,  Chih-Chien LIU ,  Jei-Ming CHEN ,  Wen-Yi TENG ,  Chieh-Wen LO

IPC: H01L29/06

CPC classification number: H01L29/0692 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/308 ,  H01L21/823821 ,  H01L29/06 ,  H01L29/66795

Abstract: A method of fabricating a spatial semiconductor structure includes steps as follows. Firstly, a semiconductor substrate is provided. Then, a first mask layer is formed above the semiconductor substrate. Then, at least a first opening is formed in the first mask layer and exposes a portion of a surface of the semiconductor substrate. Then, a first semiconductor pattern is formed in the first opening. Then, a second mask layer is formed over the first semiconductor pattern and the first mask layer. Then, at least a second opening is formed through the second mask layer to the first mask layer and exposes another portion of the surface of the semiconductor substrate. And, a second semiconductor pattern is formed in the second opening.

Abstract translation: 制造空间半导体结构的方法包括以下步骤。 首先，提供半导体衬底。 然后，在半导体衬底上形成第一掩模层。 然后，在第一掩模层中至少形成第一开口并暴露半导体衬底的一部分表面。 然后，在第一开口中形成第一半导体图形。 然后，在第一半导体图案和第一掩模层上形成第二掩模层。 然后，通过第二掩模层形成至少第二开口到第一掩模层，并暴露半导体衬底的表面的另一部分。 并且，在第二开口中形成第二半导体图案。

公开(公告)号：US20130089957A1

公开(公告)日：2013-04-11

申请号：US13693009

申请日：2012-12-03

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Teng-Chun TSAI ,  Chun-Yuan WU ,  Chin-Fu LIN ,  Chih-Chien LIU ,  Chin-Cheng CHIEN

IPC: H01L29/78

CPC classification number: H01L29/78 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7833

Abstract: A fin field-effect transistor structure includes a substrate, a fin channel and a high-k metal gate. The high-k metal gate is formed on the substrate and the fin channel. A process of manufacturing the fin field-effect transistor structure includes the following steps. Firstly, a polysilicon pseudo gate structure is formed on the substrate and a surface of the fin channel. By using the polysilicon pseudo gate structure as a mask, a source/drain region is formed in the fin channel. After the polysilicon pseudo gate structure is removed, a high-k dielectric layer and a metal gate layer are successively formed. Afterwards, a planarization process is performed on the substrate having the metal gate layer until the first dielectric layer is exposed, so that a high-k metal gate is produced.

Abstract translation: 鳍状场效应晶体管结构包括衬底，鳍状沟道和高k金属栅极。 高k金属栅极形成在基板和鳍状通道上。 制造鳍式场效应晶体管结构的工艺包括以下步骤。 首先，在基板和散热片通道的表面上形成多晶硅伪栅极结构。 通过使用多晶硅伪栅极结构作为掩模，在鳍式沟道中形成源/漏区。 在去除多晶硅伪栅极结构之后，依次形成高k电介质层和金属栅极层。 然后，在具有金属栅极层的基板上进行平坦化处理，直到第一介电层露出为止，从而产生高k金属栅极。