公开(公告)号：US20190098746A1

公开(公告)日：2019-03-28

申请号：US16203636

申请日：2018-11-29

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min TAIN ,  Kai-Ming YANG ,  Chien-Tsai LI

IPC: H05K1/02 ,  H05K1/11

Abstract: A method for forming a circuit board includes forming a first dielectric layer, a first circuit layer in the first dielectric layer, a second circuit layer on the first dielectric layer, and a plurality of conductive vias in the first dielectric layer and connecting the first circuit layer to the second circuit layer; forming a second dielectric layer on the first dielectric layer and the second circuit layer; forming a plurality of openings in the second dielectric layer to expose a plurality of parts of the second circuit layer; forming a seed layer on the exposed parts of the second circuit layer and sidewalls of the openings; and forming a plurality of bonding layers on the seed layer, wherein the bonding layers and the seed layer are made of copper, and the bonding layers are porous.

公开(公告)号：US20180332700A1

公开(公告)日：2018-11-15

申请号：US15590020

申请日：2017-05-09

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min TAIN ,  Kai-Ming YANG ,  Chien-Tsai LI

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0209 ,  H05K1/114 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/041

Abstract: A circuit board includes a first dielectric layer, a first circuit layer, a second circuit layer, a plurality of conductive vias, a second dielectric layer, a patterned seed layer, and a plurality of bonding layers. The first circuit layer is disposed in the first dielectric layer. The second circuit layer is disposed on the first dielectric layer. The conductive vias are disposed in the first dielectric layer and connect the first circuit layer to the second circuit layer. The second dielectric layer is disposed on the first dielectric layer and the second circuit layer and has a plurality of openings to expose a plurality of parts of the second circuit layer. The patterned seed layer is disposed on the exposed parts of second circuit layer and sidewalls of the openings. The bonding layers are respectively disposed on the patterned seed layer and made of porous copper.