公开(公告)号：US20250031585A1

公开(公告)日：2025-01-23

申请号：US18447317

申请日：2023-08-10

Applicant: United Microelectronics Corp.

Inventor： Zhaoyao Zhan ,  Jian Shi ,  Xiaohong Jiang ,  Ching-Hwa Tey

IPC: H10N70/00 ,  H10B63/00

Abstract: A resistive random access memory includes a first electrode, a second electrode, a dielectric layer, a protection layer, and at least one switching layer. The dielectric layer is formed on the first electrode. The dielectric layer has an opening exposing a portion of the first electrode. The protection layer is disposed on sidewalls of the opening. The switching layer is disposed on the exposed portion of the first electrode and exposes a portion of sidewalls of the protection layer. The second electrode is at least one conductive layer and is disposed on the switching layer in the opening.

公开(公告)号：US11004937B1

公开(公告)日：2021-05-11

申请号：US16733223

申请日：2020-01-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian Shi

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L23/528 ,  H01L21/768 ,  H01L21/311 ,  H01L21/84 ,  H01L21/321

Abstract: A semiconductor device includes a substrate, a gate structure, a source/drain region, a contact opening, an etching stop layer, an interlayer dielectric layer, and a first contact structure. The substrate includes a buried insulation layer, a semiconductor layer, and an isolation structure. The semiconductor layer is disposed on the buried insulation layer. The gate structure is disposed on the semiconductor layer. The isolation structure and the source/drain region are disposed in the semiconductor layer. The contact opening penetrates at least a part of the substrate. The etching stop layer is disposed on the gate structure, the source/drain region, a sidewall of the contact opening, and a bottom of the contact opening. The interlayer dielectric layer is disposed on the etching stop layer. The first contact structure penetrates the interlayer dielectric layer and the etching stop layer in the contact opening.

公开(公告)号：US20210167171A1

公开(公告)日：2021-06-03

申请号：US16733223

申请日：2020-01-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian Shi

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L23/528 ,  H01L21/84 ,  H01L21/768 ,  H01L21/311

Abstract: A semiconductor device includes a substrate, a gate structure, a source/drain region, a contact opening, an etching stop layer, an interlayer dielectric layer, and a first contact structure. The substrate includes a buried insulation layer, a semiconductor layer, and an isolation structure. The semiconductor layer is disposed on the buried insulation layer. The gate structure is disposed on the semiconductor layer. The isolation structure and the source/drain region are disposed in the semiconductor layer. The contact opening penetrates at least a part of the substrate. The etching stop layer is disposed on the gate structure, the source/drain region, a sidewall of the contact opening, and a bottom of the contact opening. The interlayer dielectric layer is disposed on the etching stop layer. The first contact structure penetrates the interlayer dielectric layer and the etching stop layer in the contact opening.